JAJSVD8
August 2024
BQ25758A
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Device Comparison
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Device Power-On-Reset
7.3.2
Device Power-Up From Battery Without Input Source
7.3.3
Device Power Up from Input Source
7.3.3.1
VAC Operating Window Programming (ACUV and ACOV)
7.3.3.2
MODE Pin Configuration
7.3.3.3
REGN Regulator (REGN LDO)
7.3.3.4
Switching Frequency and Synchronization (FSW_SYNC)
7.3.3.5
Device HIZ Mode
7.3.4
Power Management
7.3.4.1
Output Voltage Programming (VOUT_REG)
7.3.4.2
Output Current Programming (IOUT pin and IOUT_REG)
7.3.4.3
Dynamic Power Management: Input Voltage and Input Current Regulation
7.3.4.3.1
Input Current Regulation
7.3.4.3.1.1
IIN Pin
7.3.4.3.1.2
Multi-Level Current Limit (Overload Mode)
7.3.4.3.2
Input Voltage Regulation
7.3.4.4
Bypass Mode
7.3.5
Bidirectional Power Flow and Programmability
7.3.6
Integrated 16-Bit ADC for Monitoring
7.3.7
Status Outputs (PG, STAT and INT)
7.3.7.1
Power Good Indicator (PG)
7.3.7.2
Interrupt to Host (INT)
7.3.8
Protections
7.3.8.1
Voltage and Current Monitoring
7.3.8.1.1
VAC Over-voltage Protection (VAC_OVP)
7.3.8.1.2
VAC Under-voltage Protection (VAC_UVP)
7.3.8.1.3
Reverse Mode Over-voltage Protection (REV_OVP)
7.3.8.1.4
Reverse Mode Under-voltage Protection (REV_UVP)
7.3.8.1.5
DRV_SUP Under-voltage and Over-voltage Protection (DRV_OKZ)
7.3.8.1.6
REGN Under-voltage Protection (REGN_OKZ)
7.3.8.2
Thermal Shutdown (TSHUT)
7.3.9
Serial Interface
7.3.9.1
Data Validity
7.3.9.2
START and STOP Conditions
7.3.9.3
Byte Format
7.3.9.4
Acknowledge (ACK) and Not Acknowledge (NACK)
7.3.9.5
Target Address and Data Direction Bit
7.3.9.6
Single Write and Read
7.3.9.7
Multi-Write and Multi-Read
7.4
Device Functional Modes
7.4.1
Host Mode and Default Mode
7.4.2
Register Bit Reset
7.5
BQ25758A Registers
8
Application and Implementation
8.1
Application Information
8.2
Typical Applications
8.2.1
Typical Application (Buck-Boost configuration)
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.2.1
ACUV / ACOV Input Voltage Operating Window Programming
8.2.1.2.2
Switching Frequency Selection
8.2.1.2.3
Inductor Selection
8.2.1.2.4
Input (VAC) Capacitor
8.2.1.2.5
Output (VBAT) Capacitor
8.2.1.2.6
Sense Resistor (RAC_SNS and RBAT_SNS) and Current Programming
8.2.1.2.7
Converter Fast Transient Response
8.2.1.3
Application Curves
8.2.2
Typical Application (Buck-only configuration)
8.2.2.1
Design Requirements
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Device Support
11.1.1
サード・パーティ製品に関する免責事項
11.2
ドキュメントの更新通知を受け取る方法
11.3
サポート・リソース
11.4
Trademarks
11.5
静電気放電に関する注意事項
11.6
用語集
12
Revision History
13
Mechanical, Packaging, and Orderable Information
13.1
Packaging Information
13.2
Tape and Reel Information
13.3
Mechanical Data
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
メカニカル・データ(パッケージ|ピン)
RRV|36
サーマルパッド・メカニカル・データ
7
Detailed Description