JAJSVD8 August 2024 BQ25758A
PRODUCTION DATA
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The REGN LDO regulator provides a regulated bias supply for the IC and the TS external resistors. Additionally, REGN voltage can be used to drive the buck switching FETs directly by tying the DRV_SUP pin to REGN. The pull-up rail of PG, STAT can be connected to REGN as well. The REGN LDO is enabled when below conditions are valid:
At high input voltages and/or large gate drive requirements, the power loss from gate driving via the REGN LDO can be excessive. This power for the gate drivers can be provided externally by directly driving the DRV_SUP pin with a high efficiency supply ranging from 4.5 V to 12 V. This supply should be able to provide at least 50 mA or more as required to drive the switching FET gate charge.
The power dissipation for driving the gates via the REGN LDO is: , where QG(TOT)1,2 is the sum of the total gate charge for all switching FETs and fSW is the programmed switching frequency. The Safe Operating Area (SOA) below is based on a 1-W power loss limit.