SLUSFB0 August 2024 BQ25758S
PRODUCTION DATA
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
VAC / BAT POWER UP | |||||
tACOV_DGL | Enter ACOV deglitch time, ACOV rising | 100 | µs | ||
tACOVZ_DGL | Exit ACOV deglitch time, ACOV falling | 12 | ms | ||
tACUV_DGL | Enter ACUV deglitch time, ACUV falling | 100 | µs | ||
tACUVZ_DGL | Exit ACUV deglitch time, ACUV rising | 12 | ms | ||
BATTERY-PACK NTC MONITOR | |||||
tTS_DGL | Deglitch time for TS threshold crossing | 25 | ms | ||
MULTI-LEVEL CURRENT LIMIT (OVERLOAD MODE) | |||||
tOVLD | Overload time during which ILIM2 is allowed, TOVLD_SET = 0 | 25 | ms | ||
Overload time during which ILIM2 is allowed, TOVLD_SET = 1 | 50 | ms | |||
tMAX | Time required before a new overload event is allowed after an original overload event. EN_OVLD_TMAX = 1 | 100 | ms | ||
tOVLD_3L | Deglitch time before engaging ILIM2, allowing maximum current for this time. EN_OVLD_3L = 1 | 1 | ms | ||
I2C INTERFACE | |||||
fSCL | SCL clock frequency | 1000 | kHZ | ||
DIGITAL CLOCK AND WATCHDOG | |||||
tLP_WDT | I2C Watchdog reset time (EN_HIZ = 1, WATCHDOG[1:0] = 160s) | 100 | 160 | s | |
tWDT | I2C Watchdog reset time (EN_HIZ = 0, WATCHDOG[1:0] = 160s) | 130 | 160 | s |