SLUSEK7 September   2024 BQ25773

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics BQ2577X
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Power-Up Sequence
      2. 7.3.2  MODE Pin Detection
      3. 7.3.3  REGN Regulator (REGN LDO)
      4. 7.3.4  Independent Comparator Function
      5. 7.3.5  Battery Charging Management
        1. 7.3.5.1 Autonomous Charging Cycle
        2. 7.3.5.2 Battery Charging Profile
        3. 7.3.5.3 Charging Termination
        4. 7.3.5.4 Charging Safety Timer
      6. 7.3.6  Temperature Regulation (TREG)
      7. 7.3.7  Vmin Active Protection (VAP) When Battery Only Mode
      8. 7.3.8  Two Level Battery Discharge Current Limit
      9. 7.3.9  Fast Role Swap Feature
      10. 7.3.10 CHRG_OK Indicator
      11. 7.3.11 Input and Charge Current Sensing
      12. 7.3.12 Input Current and Voltage Limit Setup
      13. 7.3.13 Battery Cell Configuration
      14. 7.3.14 Device HIZ State
      15. 7.3.15 USB On-The-Go (OTG)
      16. 7.3.16 Quasi Dual Phase Converter Operation
      17. 7.3.17 Continuous Conduction Mode (CCM)
      18. 7.3.18 Pulse Frequency Modulation (PFM)
      19. 7.3.19 Switching Frequency and Dithering Feature
      20. 7.3.20 Current and Power Monitor
        1. 7.3.20.1 High-Accuracy Current Sense Amplifier (IADPT and IBAT)
        2. 7.3.20.2 High-Accuracy Power Sense Amplifier (PSYS)
      21. 7.3.21 Input Source Dynamic Power Management
      22. 7.3.22 Integrated 16-Bit ADC for Monitoring
      23. 7.3.23 Input Current Optimizer (ICO)
      24. 7.3.24 Two-Level Adapter Current Limit (Peak Power Mode)
      25. 7.3.25 Processor Hot Indication
        1. 7.3.25.1 PROCHOT During Low Power Mode
        2. 7.3.25.2 PROCHOT Status
      26. 7.3.26 Device Protection
        1. 7.3.26.1  Watchdog Timer (WD)
        2. 7.3.26.2  Input Overvoltage Protection (ACOV)
        3. 7.3.26.3  Input Overcurrent Protection (ACOC)
        4. 7.3.26.4  System Overvoltage Protection (SYSOVP)
        5. 7.3.26.5  Battery Overvoltage Protection (BATOVP)
        6. 7.3.26.6  Battery Charge Overcurrent Protection (BATCOC)
        7. 7.3.26.7  Battery Discharge Overcurrent Protection (BATDOC)
        8. 7.3.26.8  BATFET Charge Current Clamp Protection under LDO Regulation Mode
        9. 7.3.26.9  Sleep Comparator Protection Between VBUS and ACP_A (SC_VBUSACP)
        10. 7.3.26.10 High Duty Buck Exit Comparator Protection (HDBCP)
        11. 7.3.26.11 REGN Power Good Protection (REGN_PG)
        12. 7.3.26.12 System Under Voltage Lockout (VSYS_UVP) and Hiccup Mode
        13. 7.3.26.13 OTG Mode Over Voltage Protection (OTG_OVP)
        14. 7.3.26.14 OTG Mode Under Voltage Protection (OTG_UVP)
        15. 7.3.26.15 Thermal Shutdown (TSHUT)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Forward Mode
        1. 7.4.1.1 System Voltage Regulation with Narrow VDC Architecture
        2. 7.4.1.2 Battery Charging
      2. 7.4.2 USB On-The-Go Mode
      3. 7.4.3 Pass Through Mode (PTM)-Patented Technology
      4. 7.4.4 Learn Mode
    5. 7.5 Programming
      1. 7.5.1 I2C Serial Interface
        1. 7.5.1.1 Timing Diagrams
        2. 7.5.1.2 Data Validity
        3. 7.5.1.3 START and STOP Conditions
        4. 7.5.1.4 Byte Format
        5. 7.5.1.5 Acknowledge (ACK) and Not Acknowledge (NACK)
        6. 7.5.1.6 Target Address and Data Direction Bit
        7. 7.5.1.7 Single Read and Write
        8. 7.5.1.8 Multi-Read and Multi-Write
        9. 7.5.1.9 Write 2-Byte I2C Commands
    6. 7.6 BQ25773 Registers
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Snubber and Filter for Voltage Spike Damping
        2. 8.2.2.2 ACP-ACN Input Filter
        3. 8.2.2.3 Inductor Selection
        4. 8.2.2.4 Input Capacitor
        5. 8.2.2.5 Output Capacitor
        6. 8.2.2.6 Power MOSFETs Selection
  10. Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
      1. 10.2.1 Layout Example Reference Top View
  12. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • REE|36
サーマルパッド・メカニカル・データ
発注情報

Battery Charging Profile

The device charges the battery in four phases: trickle charge, pre-charge, constant current, constant voltage. At the beginning of a charging cycle, the device checks the battery voltage and regulates current/voltage accordingly. If autonomous charging is enabled, automatic termination can be achieved and automatic recharge will begin when VBAT drops below certain value of CHARGE_VOLTAGE(), user registers VRECHG bits are used to configure battery re-charge threshold.

When charger is in trickle charge status (VBAT<VBAT_SHORT) and EN_LDO=1b, charge current is upper limited by IBAT_SHORT to prevent battery from overcurrent charge and wake up battery pack. The practical charge current should be the lower value of CHARGE_CURRENT() and IBAT_SHORT to provide EC flexibility to program trickle charge current following battery package request. Note when EN_LDO=0b, IBAT_SHORT current clamp is not effective and provide EC flexibility to program charge current through CHARGE_CURRENT() register.

When charger is in pre-charge status (VBAT_SHORT<VBAT<VSYS_MIN()) and EN_LDO=1b, charge current is the lower value of IPRECHG() and CHARGE_CURRENT() setting; and the maximum charge current is limited by maximum setting of IPRECHG() which is 2048mA to prevent overheat generated on BATFET. Under this condition larger VSYS_MIN() minus VBAT delta and larger charge current should generate more thermal dissipation at BATFET which should be properly limited to ensure safe operation. Therefore the device has additional two levels current clamp to ensure the maximum BATFET dissipation loss below 2W based on the relationship between VBAT and VSYS_MIN() setting referring to Table 7-9. Note when EN_LDO=0b, pre-charge current limit (IPRECHG()) is not effective and provide EC flexibility to program charge current through CHARGE_CURRENT() register.

Table 7-3 Default Charging Current Setting
VBAT CONDITION CHARGING CURRENT DEFAULT SETTING CHRG_STAT
VBAT< VBAT_SHORT IBAT_SHORT 128mA 001
VBAT_SHORT<VBAT< VSYS_MIN() IPRECHG 384mA 010
VSYS_MIN()<VBAT<CHARGE_VOLTAGE() CHARGE_CURRENT() 0A (need host to configure based on battery request) 011

If the charger device is in DPM regulation during charging, the actual charging current will be less than the programmed value. In this case, termination is temporarily disabled and the charging safety timer is counted at half the clock rate, as detailed in Charging Safety Timer section.

BQ25773 Typical Li-Ion Battery Charging
          Profile Figure 7-4 Typical Li-Ion Battery Charging Profile