JAJSCJ2 October   2016

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
  7. 7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
      1. 8.1.1 Device Protection Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Device Power Up
      2. 8.3.2 Battery Switch (Q1 + Q2)
      3. 8.3.3 Integrated 10-bit ADC for Monitoring
      4. 8.3.4 Linear Regulation Mode (LDO)
      5. 8.3.5 Protection Features
        1. 8.3.5.1 Reverse Current Protection (RCP)
        2. 8.3.5.2 Internal Thermal Shutdown
        3. 8.3.5.3 Input Overvoltage Protection
          1. 8.3.5.3.1 OVPSET pin
        4. 8.3.5.4 IBUS and VBUS Protection
        5. 8.3.5.5 IBAT and VBAT Protection
        6. 8.3.5.6 VOUT Protection
        7. 8.3.5.7 VDROP Protection
        8. 8.3.5.8 VBUS Temperature (TS_BUS_FLT) and Battery Temperature (TS_BAT_FLT)
      6. 8.3.6 I2C Serial Interface
        1. 8.3.6.1 Data Validity
        2. 8.3.6.2 START and STOP Conditions
        3. 8.3.6.3 Byte Format
        4. 8.3.6.4 Acknowledge (ACK) and Not Acknowledge (NACK)
        5. 8.3.6.5 Slave Address and Data Direction bit
        6. 8.3.6.6 Multi-Read and Multi-Write
    4. 8.4 Device Functional Modes
    5. 8.5 I2C Register Maps
      1. 8.5.1  I2C Register Summary Table
      2. 8.5.2  REG00 (DEVICE_INFO)
      3. 8.5.3  REG01 (EVENT_1_MASK)
      4. 8.5.4  REG02 (EVENT_2_MASK)
      5. 8.5.5  REG03 (EVENT_1)
      6. 8.5.6  REG04 (EVENT_2)
      7. 8.5.7  REG05 (EVENT_1_EN)
      8. 8.5.8  REG06 (CONTROL)
      9. 8.5.9  REG07 (ADC_CONTROL)
      10. 8.5.10 REG08 (ADC_EN)
      11. 8.5.11 REG09 (PROTECTION)
      12. 8.5.12 REG0A (VBUS_OVP)
      13. 8.5.13 REG0B (VOUT_REG)
      14. 8.5.14 REG0C (VDROP_OVP)
      15. 8.5.15 REG0D (VDROP_ALM)
      16. 8.5.16 REG0E (VBAT_REG)
      17. 8.5.17 REG0F (IBAT_REG)
      18. 8.5.18 REG10 (IBUS_REG)
      19. 8.5.19 REG11 (TS_BUS_FLT)
      20. 8.5.20 REG12 (TS_BAT_FLT)
      21. 8.5.21 REG 13 and REG 14 (VBUS_ADC)
      22. 8.5.22 REG15 and REG16 (IBUS_ADC)
      23. 8.5.23 REG17 and REG18 (VOUT_ADC)
      24. 8.5.24 REG19 and REG1A (VDROP_ADC)
      25. 8.5.25 REG1B and REG1C (VBAT_ADC)
      26. 8.5.26 REG1D and REG1E (IBAT_ADC)
      27. 8.5.27 REG1F and REG20 (TS_BUS_ADC)
      28. 8.5.28 REG21 and REG22 (TS_BAT_ADC)
      29. 8.5.29 REG 23 (TDIE_ADC)
      30. 8.5.30 REG 24 (EVENT_2_EN)
      31. 8.5.31 REG 25 (EVENT_3_MASK)
      32. 8.5.32 REG 26 (EVENT_3)
      33. 8.5.33 REG27 and REG28 (VUSB_ADC)
      34. 8.5.34 REG 29 (CONTROL_2)
      35. 8.5.35 REG 40 (DIE_TEMP_FLT)
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントの更新通知を受け取る方法
    2. 12.2 コミュニティ・リソース
    3. 12.3 商標
    4. 12.4 静電気放電に関する注意事項
    5. 12.5 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Voltage range (with respect to GND) VUSB (EN = Low, or CHG_EN = '0') –2 40 V
VBUS (EN = Low, or CHG_EN = '0') –2 22 V
VOUT (EN = Low, or CHG_EN = '0') –0.3 7 V
SRP, SRN, BATP, BATN –0.3 7 V
INT, SDA, SCL, EN, CHGSTAT –0.3 7 V
TS_BUS, TS_BAT –0.3 5 V
Maximum voltage difference SRP – SRN –0.5 0.5 V
VOUT– VBUS –22 7 V
Output sink current INT 6 mA
Operating free-air temperature range –40 85 °C
Junction temperature, TJ –40 150 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VUSB EN = low, or CHG_EN = '0' 2.8 14 V
VBUS EN = high, or CHG_EN = '1' 2.8 6 V
VOUT EN = high, or CHG_EN = '1' 2.8 6 V
BATP, BATN 0 6 V
SRP – SRN Differential voltage between SRP and SRN –0.2 0.2 V
TS_BUS, TS_BAT TS pin voltage range 0 3 V
SDA, SCL, ADDR, INT, EN TS pin voltage range 0 5 V
IOUT Maximum current from VBUS to VOUT –3 7 A
TJ Operating junction temperature range –40 85 °C

6.4 Thermal Information

THERMAL METRIC(1) bq25872 UNIT
YFF (DSBGA)
42 PINS
RθJA Junction-to-ambient thermal resistance 50.0 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 0.2 °C/W
RθJB Junction-to-board thermal resistance 8.9 °C/W
ψJT Junction-to-top characterization parameter 0.1 °C/W
ψJB Junction-to-board characterization parameter 8.9 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

Unless otherwise noted, the specification in the following table applies over operating ambient temperature range –40 °C ≤ TA ≤ 85 °C. Typical values are for TA = 25 °C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
QUIESCENT CURRENTS
IQ_OP Adaptor operation quiescent current ADC disabled (ADC_EN = 0), charge disabled (CHG_EN = 0), EN = low, VVUSB= 3.6 V, VOUT floating, current into VBUS and VUSB 115 145 µA
ADC enabled (ADC_EN = 1), charge disabled (CHG_EN = 0), EN = high, VVUSB= 3.6 V, VOUT floating, current into VBUS and VUSB 1.75 2.0 mA
IQ_BAT Battery quiescent current ADC disabled (ADC_EN = 0), charge disabled (CHG_EN = 0), EN = low, VVOUT = 3.6 V, current into VOUT 20 30 µA
ADC disabled (ADC_EN = 0), charge disabled (CHG_EN = 0), EN = high, VVOUT = 3.6 V, current into VOUT 80 120 µA
ADC enable (ADC_EN = 1), charge disabled (CHG_EN = 0), EN = high, VVOUT = 3.6 V, current into VOUT 1.35 1.75 mA
RESISTANCE AND LEAKAGE
RON VBUS to VOUT resistance VVBUS = 3.6 V, TA = 25 °C 13 16 mΩ
VVBUS = 3.6 V, –40 °C ≤ TA ≤ 85 °C 13 22 mΩ
VVBUS_PD VBUS pull-down resistance VBUS_PD_EN = '1' 0.5 1.0 1.35 kΩ
INTERNAL THRESHOLDS
VUSB_PRESENT Rising 3.2 V
Falling hysteresis 375 mV
VBUS_PRESENT Rising 2.8 V
Falling hysteresis 120 mV
VBAT_INSERT Rising 2.8 V
Falling hysteresis 120 mV
TSHUT Internal thermal shutdown- rising 150 °C
TSHUT_HYS TSHUT falling hysteresis 30 °C
IRCP Current from VOUT to VBUS RCP_SET = '0' 0.10 0.25 0.40 A
RCP_SET = '1' 2.75 3.00 3.25 A
ISCP Short circuit current from VBUS to VOUT 10 A
VOVPSET VUSBOVP_setting = 6.5 V leave pin floating, resistance to ground 100 kΩ
VUSBOVP_setting = 10.5 V Tie to GND with a 22-kΩ series resistor, resistance to ground 17.6 26.4 kΩ
VUSBOVP_setting = 14.0 V Short to ground, resistance to ground 2.0 kΩ
VUSB_OVP Rising VUSBOVP_I2C = '00' 5.6 6.0 V
Falling hystersis VUSBOVP_I2C = '00' 100 mV
Rising VUSBOVP_I2C = '01' or OVPSET pin = floating (VUSBOVP_12C = '01', '10' or '11' ) 6.5 7.0 V
Falling hystersis VUSBOVP_I2C = '01' or OVPSET pin = floating (VUSBOVP_12C = '01', '10' or '11' ) 120 mV
Rising VUSBOVP_I2C = '10' (OVPSET pin = mid or ground) or OVPSET pin = low (VUSBOVP_12C = ('10' or '11' ) 10.8 11.3 V
Falling hystersis VUSBOVP_I2C = '10' (OVPSET pin = mid or low ) or OVPSET pin = low (VUSBOVP_12C = ('10' or '11' ) 200 mV
Rising VUSBOVP_I2C = '11' and OVPSET pin = low 14.5 15.0 V
Falling hystersis VUSBOVP_I2C = '11' and OVPSET pin = low 300 mV
PROTECTION THRESHOLD and ACCURACY
VDROP_OVP VDROP OVP range VBUS – VOUT. Programmable range 0 1000 mV
VDROP OVP step size 0 mV ≤ VDROP_OVP ≤ 640 mV 10 mV
700 mV < VDROP_OVP ≤ 1000 mV 100 mV
VDROP OVP comparator accuracy VDROP_OVP = 80 mV –8.0% 8.0%
VDROP_OVP = 160 mV –5.0% 5.0%
VDROP_ALM VDROP ALM range VBUS – VOUT. Programmable range 0 1000 mV
VDROP ALM step size 0 mV ≤ VDROP_OVP ≤ 640 mV 10 mV
700 mV < VDROOP_OVP ≤ 1000 mV 100 mV
VDROP ALM comparator accuracy VDROP_ALM = 80 mV –8.0% 8.0%
VDROP_ALM = 160 mV –5.0% 5.0%
VDROP ALM falling hysteresis 10 mV
VBUS_OVP VBUS OVP range Programmable range 4.20 6.51 V
VBUS OVP step size 30 mV
VBUS OVP comparator accuracy VBUS_OVP = 4.20 V –1.25% 1.25%
VBUS_OVP = 4.50 V –1.25% 1.25%
VBUS_OVP = 5.49 V –1.25% 1.25%
VBUS OVP falling hysteresis VBUS_OVP = 4.20 V 50 mV
IBUS_REG IBUS REG range Programmable range 0 6.3 A
IBUS REG step size 100 mA
IBUS REG accuracy IBUS_REG = 1.5 A, –40 °C ≤ TA ≤ 85 °C –20% 20%
IBUS_REG = 1.5 A, TA = 25 °C –10% 10%
IBUS_OCP IBUS OCP range Programmable range 0 7.5 A
IBUS OCP step size 500 mA
IBUS OCP comparator accuracy IBUS_OCP = 1.5 A –20% 20%
IBAT_REG IBAT REG range Programmable range 0 6.35 A
IBAT REG step Rsense = 10 mΩ 50 mA
IBAT REG accuracy IBAT_REG = 2 A, Rsense = 10 mΩ –6.5% 6.5%
IBAT_REG = 5 A, Rsense = 10 mΩ –4% 2%
IBAT_OCP IBAT OCP rising threshold Percentage of IBAT_REG threshold, IBAT_REG = 6 A 105%
IBAT OCP falling threshold Percentage of IBAT_REG threshold, IBAT_REG = 6 A 102.5%
VBAT_REG VBAT REG range Programmable range 4.2 4.975 V
VBAT REG step size 12.5 mV
VBAT REG accuracy VBAT_REG = 4.35 V –1.5% 1.0%
VBAT_REG = 4.40 V –1.5% 1.0%
VBAT_OVP VBAT OVP rising threshold Percentage of VBAT_REG threshold, VBAT_REG = 4.40 V 104%
VBAT OVP falling threshold Percentage of VBAT_REG threshold, VBAT_REG = 4.40 V 102%
VOUT_REG VOUT REG range Programmable range 4.2 4.975 V
VOUT REG step size 25 mV
VOUT REG accuracy VOUT_REG = 4.35 V –0.5% 0.5%
VOUT_REG = 4.40 V –0.5% 0.5%
VOUT_OVP VOUT OVP rising threshold Percentage of VOUT_REG threshold, VOUT_REG = 4.40 V 104%
VOUT OVP falling threshold Percentage of VOUT_REG threshold, VOUT_REG = 4.40 V 102%
TSBUS_FLT TS_BUS pin voltage range Programmable range 0.2 1.4 V
TS_BUS step size 25 mV
TS_BUS comparator accuracy TS_BUS = 0.4 V –4.0% 4.0%
TS_BUS = 0.7 V –4.0% 4.0%
TS_BUS hysteresis 1%
TSBAT_FLT TS_BAT pin voltage range Programmable range 0.2 1.4 V
TS_BAT step size 25 mV
TS_BAT comparator accuracy TS_BAT = 0.4 V –2.5% 2.5%
TS_BAT = 0.6 V –2.5% 2.5%
TS_BAT hysteresis 1%
INTEGRATED ADC: temperature range: 0°C ≤ TA ≤ 85°C
ADCRES Resolution 10 bits
tADC_CONV ADC individual measurement and conversion time 30 µs
tADC_INT ADC samples interval in averaging mode 300 µs
RANGEIBAT IBAT current measurement range 0 7.504 A
RESIBAT IBAT current LSB 8 mA
ACCIBAT IBAT accuracy IBAT = 6 A –2% 2%
RANGEIBUS IBUS current measurement range 0 7.504 A
RESIBUS IBUS current LSB 8 mA
ACCIBUS IBUS accuracy IBUS = 1.6 A –5% 5%
ACCIBUS IBUS accuracy IBUS = 5 A –4.5% 4.5%
RANGEVBUS VBUS voltage measurement range 2.048 6.140 V
RESVBUS VBUS voltage LSB 4 mV
ACCVBUS VBUS accuracy VBUS = 4.5 V –20 20 mV
RANGEVUSB VUSB voltage measurement range 2.048 6.140 V
RESVUSB VUSB voltage LSB 4 mV
ACCVUSB VUSB accuracy VUSB = 4.5 V –20 20 mV
RANGEVBAT VBAT voltage measurement range 2.048 6.140 V
RESVBAT VBAT voltage LSB 4 mV
ACCVBAT VBAT accuracy VBAT = 4.4 V -12 12 mV
RANGEVOUT VOUT voltage measurement range 2.048 6.140 V
RESVOUT VOUT voltage LSB 4 mV
ACCVOUT VOUT accuracy VOUT = 4.4 V -12 12 mV
RANGEVDROP VDROP voltage measurement range 0 1000 mV
RESVDROP VDROP voltage LSB 1 mV
ACCVDROP VDROP accuracy VDROP = 200 mV -10 10 mV
RANGETS_BUS TS_BUS voltage measurement range 0 2.420 V
RESTS_BUS TS_BUS voltage LSB 4 mV
ACCTS_BUS TS_BUS accuracy TS_BUS = 400 mV -13.4 13.4 mV
RANGETS_BAT TS_BAT voltage measurement range 0 2.420 V
RESTS_BAT TS_BAT voltage LSB 4 mV
ACCTS_BAT TS_BAT accuracy TS_BAT = 400 mV -13.4 13.4 mV
LOGIC I/O THRESHOLD (EN, INT, ADDR)
VIL Input low threshold level ISINK = 5 mA 0.4 V
VIH Input high threshold level ISINK = 5 mA 1.3 V
ILEAK (INT) High level leakage current VPULL-UP = 3.3 V 5 µA
ILEAK (CHGSTAT) High level leakage current VPULL-UP = 3.3 V 5 µA
ILEAK (EN) High level leakage current VPULL-UP = 3.3 V 10 µA
I2C TIMINGS
VIL Input low threshold level VPULL-UP = 1.8 V, SDA and SCL 0.4 V
VIH Input high threshold level VPULL-UP = 1.8 V, SDA and SCL 1.3 V
VOL Output low threshold level IOL = 20 mA 0.4 V
IBIAS High-level leakage current VPULL-UP = 1.8 V, SDA and SCL 5 µA
fSCL SCL clock frequency 1 MHz

6.6 Timing Requirements

MIN NOM MAX UNIT
PROTECTION
OSC Oscillator frequency 1.8 2 2.4 MHz
tVBUS_OVP VBUS OVP deglitch time, VBUS_OVP_DLY = 0 8 µs
tVBUS_OVP VBUS OVP deglitch time, VBUS_OVP_DLY = 1 128 µs
tIBUS_OCP_BLANK IBUS OCP deglitch time, OCP_RES = 0 8 µs
tIBUS_OCP IBUS OCP deglitch time in hiccup mode, OCP_RES = 1 8 µs
tIBUS_OCP_HP Retry wait time for IBUS OCP in hiccup mode, OCP_RES = 1 100 ms
tIBUS_OCP_RST Hiccup count reset timer 400 ms
tIBAT_OCP IBAT OCP deglitch time 512 µs
tVDROP_OVP VDROP deglitch time 64 µs
tVBAT_OVP VBAT OVP deglitch time 64 µs
tVOUT_OVP VOUT OVP deglitch time 64 µs
tLDO_RES LDO response time for IBUS, IBAT, VBAT, VOUT 1 ms
tLDO_ACTIVE LDO active signal deglitch time 128 µs
TTS_OTP TS_BAT and TS_BUS deglitch time 100 ms
tIREV Reverse current protection (RCP) deglitch time 8 µs
tSCP Short circuit protection (RCP) deglitch time 2 µs
tON_VOUT VOUT soft-start rise time 0.5 ms
tOFF_FET Battery switch turn off time 1 µs
tOFF_FLT Battery switch turn-off time, RVBUS = 100 Ω, CVBUS = 0 µF, when VVUSB > VUSBOVP to VOVPGATE falling (95 % threshold) 100 ns
tWTDG Watchdog timer WATCHDOG[3:2] = 01 0.5 s
WATCHDOG[3:2] = 10 1 s
WATCHDOG[3:2] = 11 2 s