JAJSCJ2
October 2016
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
4
改訂履歴
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
7
Typical Characteristics
8
Detailed Description
8.1
Overview
8.1.1
Device Protection Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Device Power Up
8.3.2
Battery Switch (Q1 + Q2)
8.3.3
Integrated 10-bit ADC for Monitoring
8.3.4
Linear Regulation Mode (LDO)
8.3.5
Protection Features
8.3.5.1
Reverse Current Protection (RCP)
8.3.5.2
Internal Thermal Shutdown
8.3.5.3
Input Overvoltage Protection
8.3.5.3.1
OVPSET pin
8.3.5.4
IBUS and VBUS Protection
8.3.5.5
IBAT and VBAT Protection
8.3.5.6
VOUT Protection
8.3.5.7
VDROP Protection
8.3.5.8
VBUS Temperature (TS_BUS_FLT) and Battery Temperature (TS_BAT_FLT)
8.3.6
I2C Serial Interface
8.3.6.1
Data Validity
8.3.6.2
START and STOP Conditions
8.3.6.3
Byte Format
8.3.6.4
Acknowledge (ACK) and Not Acknowledge (NACK)
8.3.6.5
Slave Address and Data Direction bit
8.3.6.6
Multi-Read and Multi-Write
8.4
Device Functional Modes
8.5
I2C Register Maps
8.5.1
I2C Register Summary Table
8.5.2
REG00 (DEVICE_INFO)
8.5.3
REG01 (EVENT_1_MASK)
8.5.4
REG02 (EVENT_2_MASK)
8.5.5
REG03 (EVENT_1)
8.5.6
REG04 (EVENT_2)
8.5.7
REG05 (EVENT_1_EN)
8.5.8
REG06 (CONTROL)
8.5.9
REG07 (ADC_CONTROL)
8.5.10
REG08 (ADC_EN)
8.5.11
REG09 (PROTECTION)
8.5.12
REG0A (VBUS_OVP)
8.5.13
REG0B (VOUT_REG)
8.5.14
REG0C (VDROP_OVP)
8.5.15
REG0D (VDROP_ALM)
8.5.16
REG0E (VBAT_REG)
8.5.17
REG0F (IBAT_REG)
8.5.18
REG10 (IBUS_REG)
8.5.19
REG11 (TS_BUS_FLT)
8.5.20
REG12 (TS_BAT_FLT)
8.5.21
REG 13 and REG 14 (VBUS_ADC)
8.5.22
REG15 and REG16 (IBUS_ADC)
8.5.23
REG17 and REG18 (VOUT_ADC)
8.5.24
REG19 and REG1A (VDROP_ADC)
8.5.25
REG1B and REG1C (VBAT_ADC)
8.5.26
REG1D and REG1E (IBAT_ADC)
8.5.27
REG1F and REG20 (TS_BUS_ADC)
8.5.28
REG21 and REG22 (TS_BAT_ADC)
8.5.29
REG 23 (TDIE_ADC)
8.5.30
REG 24 (EVENT_2_EN)
8.5.31
REG 25 (EVENT_3_MASK)
8.5.32
REG 26 (EVENT_3)
8.5.33
REG27 and REG28 (VUSB_ADC)
8.5.34
REG 29 (CONTROL_2)
8.5.35
REG 40 (DIE_TEMP_FLT)
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
デバイスおよびドキュメントのサポート
12.1
ドキュメントの更新通知を受け取る方法
12.2
コミュニティ・リソース
12.3
商標
12.4
静電気放電に関する注意事項
12.5
Glossary
13
メカニカル、パッケージ、および注文情報
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
YFF|42
MXBG341
サーマルパッド・メカニカル・データ
発注情報
jajscj2_oa
7
Typical Characteristics
Figure 1.
VBAT ADC vs Temperature at 4.4 V
Figure 3.
IBAT ADC vs Temperature at 6 A
Figure 5.
Quiescent Current with Battery Only vs Temperature
Figure 7.
VOUT Regulation vs Temperature
Figure 9.
IBAT Regulation vs Temperature at 2 A
Figure 2.
IBAT ADC vs Temperature at 2 A
Figure 4.
VOUT ADC vs Temperature at 4.4 V
Figure 6.
R
dson
vs Temperature
Figure 8.
VBAT Regulation vs Temperature
Figure 10.
IBAT Regulation vs Temperature at 6 A