JAJSFD8A September   2016  – May 2018 BQ25890H

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     概略回路図
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Functional Block Diagram
    2. 8.2 Feature Description
      1. 8.2.1  Device Power-On-Reset (POR)
      2. 8.2.2  Device Power Up from Battery without Input Source
      3. 8.2.3  Device Power Up from Input Source
        1. 8.2.3.1 Power Up REGN Regulation (LDO)
        2. 8.2.3.2 Poor Source Qualification
        3. 8.2.3.3 Input Source Type Detection
          1. 8.2.3.3.1 D+/D– Detection Sets Input Current Limit
          2. 8.2.3.3.2 Force Input Current Limit Detection
        4. 8.2.3.4 Input Voltage Limit Threshold Setting (VINDPM Threshold)
        5. 8.2.3.5 Converter Power-Up
      4. 8.2.4  Input Current Optimizer (ICO)
      5. 8.2.5  Boost Mode Operation from Battery
      6. 8.2.6  Power Path Management
        1. 8.2.6.1 Narrow VDC Architecture
        2. 8.2.6.2 Dynamic Power Management
        3. 8.2.6.3 Supplement Mode
      7. 8.2.7  Battery Charging Management
        1. 8.2.7.1 Autonomous Charging Cycle
        2. 8.2.7.2 Battery Charging Profile
        3. 8.2.7.3 Charging Termination
        4. 8.2.7.4 Resistance Compensation (IRCOMP)
        5. 8.2.7.5 Thermistor Qualification
          1. 8.2.7.5.1 JEITA Guideline Compliance in Charge Mode
          2. 8.2.7.5.2 Cold/Hot Temperature Window in Boost Mode
        6. 8.2.7.6 Charging Safety Timer
      8. 8.2.8  Battery Monitor
      9. 8.2.9  Status/Control Outputs (STAT, INT and DSEL)
        1. 8.2.9.1 Charging Status Indicator (STAT)
        2. 8.2.9.2 Interrupt to Host (INT)
        3. 8.2.9.3 D+/D- Multiplexer Selection Control
      10. 8.2.10 BATET (Q4) Control
        1. 8.2.10.1 BATFET Disable Mode (Shipping Mode)
        2. 8.2.10.2 BATFET Enable (Exit Shipping Mode)
        3. 8.2.10.3 BATFET Full System Reset
      11. 8.2.11 Current Pulse Control Protocol
      12. 8.2.12 D+/D- Output Driver
      13. 8.2.13 Input Current Limit on ILIM
      14. 8.2.14 Thermal Regulation and Thermal Shutdown
        1. 8.2.14.1 Thermal Protection in Buck Mode
        2. 8.2.14.2 Thermal Protection in Boost Mode
      15. 8.2.15 Voltage and Current Monitoring in Buck and Boost Mode
        1. 8.2.15.1 Voltage and Current Monitoring in Buck Mode
          1. 8.2.15.1.1 Input Overvoltage (ACOV)
          2. 8.2.15.1.2 System Overvoltage Protection (SYSOVP)
        2. 8.2.15.2 Voltage and Current Monitoring in Boost Mode
          1. 8.2.15.2.1 VBUS Overcurrent Protection
          2. 8.2.15.2.2 Boost Mode Overvoltage Protection
      16. 8.2.16 Battery Protection
        1. 8.2.16.1 Battery Overvoltage Protection (BATOVP)
        2. 8.2.16.2 Battery Over-Discharge Protection
        3. 8.2.16.3 System Overcurrent Protection
      17. 8.2.17 Serial Interface
        1. 8.2.17.1 Data Validity
        2. 8.2.17.2 START and STOP Conditions
        3. 8.2.17.3 Byte Format
        4. 8.2.17.4 Acknowledge (ACK) and Not Acknowledge (NACK)
        5. 8.2.17.5 Slave Address and Data Direction Bit
        6. 8.2.17.6 Single Read and Write
        7. 8.2.17.7 Multi-Read and Multi-Write
    3. 8.3 Device Functional Modes
      1. 8.3.1 Host Mode and Default Mode
    4. 8.4 Register Maps
      1. 8.4.1  REG00
        1. Table 8. REG00
      2. 8.4.2  REG01
        1. Table 9. REG01
      3. 8.4.3  REG02
        1. Table 10. REG02
      4. 8.4.4  REG03
        1. Table 11. REG03
      5. 8.4.5  REG04
        1. Table 12. REG04
      6. 8.4.6  REG05
        1. Table 13. REG05
      7. 8.4.7  REG06
        1. Table 14. REG06
      8. 8.4.8  REG07
        1. Table 15. REG07
      9. 8.4.9  REG08
        1. Table 16. REG08
      10. 8.4.10 REG09
        1. Table 17. REG09
      11. 8.4.11 REG0A
        1. Table 18. REG0A
      12. 8.4.12 REG0B
        1. Table 19. REG0B
      13. 8.4.13 REG0C
        1. Table 20. REG0C
      14. 8.4.14 REG0D
        1. Table 21. REG0D
      15. 8.4.15 REG0E
        1. Table 22. REG0E
      16. 8.4.16 REG0F
        1. Table 23. REG0F
      17. 8.4.17 REG10
        1. Table 24. REG10
      18. 8.4.18 REG11
        1. Table 25. REG11
      19. 8.4.19 REG12
        1. Table 26. REG12
      20. 8.4.20 REG13
        1. Table 27. REG13
      21. 8.4.21 REG14
        1. Table 28. REG14
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Buck Input Capacitor
        3. 9.2.2.3 System Output Capacitor
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.4.10 REG09

Figure 35. REG09
7 6 5 4 3 2 1 0
0 1 0 0 0 1 0 0
R/W R/W R/W R/W R/W R/W R/W R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 17. REG09

Bit Field Type Reset Description
7 FORCE_ICO R/W by Softwareby
by Watchdog		 Force Start Input Current Optimizer (ICO)
0 – Do not force ICO (default)
1 – Force ICO
Note:
This bit is can only be set only and always returns to 0 after ICO starts
6 TMR2X_EN R/W by Softwareby
by Watchdog		 Safety Timer Setting during DPM or Thermal Regulation
0 – Safety timer not slowed by 2X during input DPM or thermal regulation
1 – Safety timer slowed by 2X during input DPM or thermal regulation (default)
5 BATFET_DIS R/W by Softwareby Force BATFET off to enable ship mode
0 – Allow BATFET turn on (default)
1 – Force BATFET off
4 JEITA_VSET (45C-60C) R/W by Software
by Watchdog		 JEITA High Temperature Voltage Setting
0 – Set Charge Voltage to VREG-200mV during JEITA hig temperature (default)
1 – Set Charge Voltage to VREG during JEITA high temperature
3 BATFET_DLY R/W by Softwareby BATFET turn off delay control
0 – BATFET turn off immediately when BATFET_DIS bit is set (default)
1 – BATFET turn off delay by tSM_DLY when BATFET_DIS bit is set
2 BATFET_RST_EN R/W by Softwareby BATFET full system reset enable
0 – Disable BATFET full system reset
1 – Enable BATFET full system reset (default)
1 PUMPX_UP R/W by Softwareby
by Watchdog		 Current pulse control voltage up enable
0 – Disable (default)
1 – Enable
Note:
This bit is can only be set when EN_PUMPX bit is set and returns to 0 after current pulse control sequence is completed
0 PUMPX_DN R/W by Softwareby
by Watchdog		 Current pulse control voltage down enable
0 – Disable (default)
1 – Enable
Note:
This bit is can only be set when EN_PUMPX bit is set and returns to 0 after current pulse control sequence is completed