JAJSFD7C
July 2015 – May 2018
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
概略回路図
4
改訂履歴
5
概要(続き)
6
Device Comparison Table
7
Pin Configuration and Functions
Pin Functions
8
Specifications
8.1
Absolute Maximum Ratings
8.2
ESD Ratings
8.3
Recommended Operating Conditions
8.4
Thermal Information
8.5
Electrical Characteristics
8.6
Timing Requirements
8.7
Typical Characteristics
9
Detailed Description
9.1
Functional Block Diagram
9.2
Feature Description
9.2.1
Device Power-On-Reset (POR)
9.2.2
Device Power Up from Battery without Input Source
9.2.3
Device Power Up from Input Source
9.2.3.1
Power Up REGN Regulation (LDO)
9.2.3.2
Poor Source Qualification
9.2.3.3
Input Source Type Detection
9.2.3.3.1
PSEL Pins Set Input Current Limit
9.2.3.3.2
Force Input Current Limit Detection
9.2.3.4
Input Voltage Limit Threshold Setting (VINDPM Threshold)
9.2.3.5
Converter Power-Up
9.2.4
Input Current Optimizer (ICO)
9.2.5
Boost Mode Operation from Battery
9.2.6
Power Path Management
9.2.6.1
Narrow VDC Architecture
9.2.6.2
Dynamic Power Management
9.2.6.3
Supplement Mode
9.2.7
Battery Charging Management
9.2.7.1
Autonomous Charging Cycle
9.2.7.2
Battery Charging Profile
9.2.7.3
Charging Termination
9.2.7.4
Resistance Compensation (IRCOMP)
9.2.7.5
Thermistor Qualification
9.2.7.5.1
JEITA Guideline Compliance in Charge Mode
9.2.7.5.2
Cold/Hot Temperature Window in Boost Mode
9.2.7.6
Charging Safety Timer
9.2.8
Battery Monitor
9.2.9
Status Outputs (PG, STAT, and INT)
9.2.9.1
Power Good Indicator (PG)
9.2.9.2
Charging Status Indicator (STAT)
9.2.9.3
Interrupt to Host (INT)
9.2.10
BATET (Q4) Control
9.2.10.1
BATFET Disable Mode (Shipping Mode)
9.2.10.2
BATFET Enable (Exit Shipping Mode)
9.2.10.3
BATFET Full System Reset
9.2.11
Current Pulse Control Protocol
9.2.12
Input Current Limit on ILIM
9.2.13
Thermal Regulation and Thermal Shutdown
9.2.13.1
Thermal Protection in Buck Mode
9.2.13.2
Thermal Protection in Boost Mode
9.2.14
Voltage and Current Monitoring in Buck and Boost Mode
9.2.14.1
Voltage and Current Monitoring in Buck Mode
9.2.14.1.1
Input Overvoltage (ACOV)
9.2.14.1.2
System Overvoltage Protection (SYSOVP)
9.2.14.2
Current Monitoring in Boost Mode
9.2.14.2.1
VBUS Overcurrent Protection
9.2.14.2.2
Boost Mode Overvoltage Protection
9.2.15
Battery Protection
9.2.15.1
Battery Overvoltage Protection (BATOVP)
9.2.15.2
Battery Over-Discharge Protection
9.2.15.3
System Overcurrent Protection
9.2.16
Serial Interface
9.2.16.1
Data Validity
9.2.16.2
START and STOP Conditions
9.2.16.3
Byte Format
9.2.16.4
Acknowledge (ACK) and Not Acknowledge (NACK)
9.2.16.5
Slave Address and Data Direction Bit
9.2.16.6
Single Read and Write
9.2.16.7
Multi-Read and Multi-Write
9.3
Device Functional Modes
9.3.1
Host Mode and Default Mode
9.4
Register Maps
9.4.1
REG00
Table 6.
REG00
9.4.2
REG01
Table 7.
REG01
9.4.3
REG02
Table 8.
REG02
9.4.4
REG03
Table 9.
REG03
9.4.5
REG04
Table 10.
REG04
9.4.6
REG05
Table 11.
REG05
9.4.7
REG06
Table 12.
REG06
9.4.8
REG07
Table 13.
REG07
9.4.9
REG08
Table 14.
REG08
9.4.10
REG09
Table 15.
REG09
9.4.11
REG0A
Table 16.
REG0A
9.4.12
REG0B
Table 17.
REG0B
9.4.13
REG0C
Table 18.
REG0C
9.4.14
REG0D
Table 19.
REG0D
9.4.15
REG0E
Table 20.
REG0E
9.4.16
REG0F
Table 21.
REG0F
9.4.17
REG10
Table 22.
REG10
9.4.18
REG11
Table 23.
REG11
9.4.19
REG12
Table 24.
REG12
9.4.20
REG13
Table 25.
REG13
9.4.21
REG14
Table 26.
REG14
10
Application and Implementation
10.1
Application Information
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.2.1
Inductor Selection
10.2.2.2
Buck Input Capacitor
10.2.2.3
System Output Capacitor
10.2.3
Application Curves
10.3
System Examples
11
Power Supply Recommendations
12
Layout
12.1
Layout Guidelines
12.2
Layout Example
13
デバイスおよびドキュメントのサポート
13.1
ドキュメントのサポート
13.1.1
関連資料
13.2
ドキュメントの更新通知を受け取る方法
13.3
コミュニティ・リソース
13.4
商標
13.5
静電気放電に関する注意事項
13.6
Glossary
14
メカニカル、パッケージ、および注文情報
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RTW|24
MPQF167C
サーマルパッド・メカニカル・データ
RTW|24
QFND125K
発注情報
jajsfd7c_oa
jajsfd7c_pm
2
アプリケーション
スマートフォン
タブレットPC
携帯用インターネット・デバイス