JAJSFD7C July 2015 – May 2018
PRODUCTION DATA.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Bit | Field | Type | Reset | Description | |
---|---|---|---|---|---|
7 | IPRECHG[3] | R/W | by REG_RST
by Watchdog |
512mA | Precharge Current Limit
Offset: 64mA Range: 64mA – 1024mA Default: 128mA (0001) |
6 | IPRECHG[2] | R/W | by REG_RST
by Watchdog |
256mA | |
5 | IPRECHG[1] | R/W | by REG_RST
by Watchdog |
128mA | |
4 | IPRECHG[0] | R/W | by REG_RST
by Watchdog |
64mA | |
3 | ITERM[3] | R/W | by REG_RST
by Watchdog |
512mA | Termination Current Limit
Offset: 64mA Range: 64mA – 1024mA Default: 256mA (0011) |
2 | ITERM[2] | R/W | by REG_RST
by Watchdog |
256mA | |
1 | ITERM[1] | R/W | by REG_RST
by Watchdog |
128mA | |
0 | ITERM[0] | R/W | by REG_RST
by Watchdog |
64mA |