JAJSLA6 February   2021 BQ25960

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 概要 (続き)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Charging System
      2. 9.3.2  Battery Charging Profile
      3. 9.3.3  Device Power Up
      4. 9.3.4  Device HIZ State
      5. 9.3.5  Dual Input Bi-Directional Power Path Management
        1. 9.3.5.1 ACDRV Turn-On Condition
        2. 9.3.5.2 Single Input from VAC to VBUS without ACFET-RBFET
        3. 9.3.5.3 Single Input with ACFET1
        4. 9.3.5.4 Dual Input with ACFET1-RBFET1
        5. 9.3.5.5 Dual Input with ACFET1-RBFET1 and ACFET2-RBFET2
        6. 9.3.5.6 OTG and Reverse TX Mode Operation
      6. 9.3.6  Bypass Mode Operation
      7. 9.3.7  Charging Start-Up
      8. 9.3.8  Adapter Removal
      9. 9.3.9  Integrated 16-Bit ADC for Monitoring and Smart Adapter Feedback
      10. 9.3.10 Device Modes and Protection Status
        1. 9.3.10.1 Input Overvoltage, Overcurrent, Undercurrent, Reverse-Current and Short-Circuit Protection
        2. 9.3.10.2 Battery Overvoltage and Overcurrent Protection
        3. 9.3.10.3 IC Internal Thermal Shutdown, TSBUS, and TSBAT Temperature Monitoring
      11. 9.3.11 INT Pin, STAT, FLAG, and MASK Registers
      12. 9.3.12 Dual Charger Operation Using Primary and Secondary Modes
      13. 9.3.13 CDRVH and CDRVL_ADDRMS Functions
    4. 9.4 Programming
      1. 9.4.1 F/S Mode Protocol
    5. 9.5 Register Maps
      1. 9.5.1 I2C Registers
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Standalone Application Information (for use with main charger)
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
        3. 10.2.1.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 サード・パーティ製品に関する免責事項
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 ドキュメントの更新通知を受け取る方法
    4. 13.4 サポート・リソース
    5. 13.5 Trademarks
    6. 13.6 静電気放電に関する注意事項
    7. 13.7 用語集
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7 Pin Configuration and Functions

GUID-20210206-CA0I-MVQF-MCN1-97MBP0WN57LT-low.gif Figure 7-1 YBG Package - BQ2596036-Pin DSBGATop View
Table 7-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NO. NAME
F3 ACDRV1 P Input FETs Driver Pin 1 - The charge pump output to drive the port #1 input N-channel MOSFET (ACFET1) and the reverse blocking N-channel MOSFET (RBFET1). ACDRV1 voltage becomes 5 V above the common drain connection of the ACFET1 and RBFET1, when the turn-on condition is met. If ACFET1 and RBFET1 are not used, connect ACDRV1 to ground.
F2 ACDRV2 P Input FETs Driver Pin 2 -The charge pump output to drive the port #2 input N-channel MOSFET (ACFET2) and the reverse blocking N-channel MOSFET (RBFET2). ACDRV2 voltage becomes 5 V above the common drain connection of the ACFET2 and RBFET2, when the turn-on condition is met. If ACFET2 and RBFET2 are not used, connect ACDRV2 to ground.
E6 BATN_SRP AI Negative input for battery voltage sensing and positive input for battery current sensing- Connect to negative terminal of battery pack. It is also used for battery current sensing. Place RSNS (2 mΩ or 5 mΩ) between BATN_SRP and SRN_SYNCIN. Short BATN_SRP to SRN_SYNCIN together and place 100-Ω series resistance between pin and negative terminal if RSNS is not being used.
F6 BATP AI Positive input for battery voltage sensing - Connect to positive terminal of battery pack. Place 100-Ω series resistance between pin and positive terminal.
D1 CDRVH AIO Charge pump for gate drive - Connect a 0.22-µF cap between CDRVH and CDRVL_ADDRMS.
E1 CDRVL_ADDRMS AIO Charge pump for gate drive - Connect a 0.22-µF cap between CDRVH and CDRVL_ADDRMS. During Power ON Reset (POR), this pin is used to assign the address of the device and the mode of the device as Standalone, Primary, or Secondary.
A4, B4 CFH1 P Switched cap flying cap connection -Connect 1 to 3 22-µF caps in parallel between this pin and CFL1.
C4, D4 CFH2 P Switched cap flying cap connection -Connect 1 to 3 22-µF caps in parallel between this pin and CFL2.
A2, B2 CFL1 P Switched cap flying cap connection -Connect 1 to 3 22-µF caps in parallel between this pin and CFH1.
C2, D2 CFL2 P Switched cap flying cap connection -Connect 1 to 3 22-µF caps in parallel between this pin and CFH2.
D5 INT DO Open drain, active low interrupt output - Pull up to voltage with 10-kΩ resistor. Normally high, the device asserts low to report status and faults. INT is pulsed low for tINT.
A1, B1, C1 GND P Ground return
A5, B5, C5 PMID P Input to the switched cap power stage -Connect 10-µF cap to PMID.
F1 REGN AO Charger internal LDO output - Connect a 4.7-µF cap between this pin and GND. When in Primary/Secondary Mode, connect through 1-kΩ resistor to the TSBAT_SYNCOUT and SRN_SYNCIN pins. Do not use REGN for any other function.
E5 SCL DI I2C interface clock - Pull up to 3.3 V with 10-kΩ resistor.
F5 SDA DIO I2C interface data - Pull up to 3.3 V with 10-kΩ resistor.
D6 SRN_SYNCIN AI Negative input for battery current sensing - Place RSNS (2 mΩ or 5 mΩ) between SRN_SYNCIN and SRP. Short to SRP and SRN_SYNCIN together if not used. If configured as a secondary for dual charger configuration, this pin functions as SYNCIN, and connect to TSBAT_SYNCOUT of Primary, and connect a 1-kΩ pullup resistor to REGN.
E4 TSBAT_SYNCOUT AI Battery temperature voltage input and Primary Mode SYNCOUT - Requires external resistor divider, NTC, and voltage reference. See the TSBAT section for choosing the resister divider values. If the device is in Primary Mode, connect this pin to SRN_SYNCIN of the Secondary device.
F4 TSBUS AI BUS temperature voltage input - Requires external resistor divider, NTC, and voltage reference. See the TSBUS section for choosing the resister divider values.
A6, B6, C6 VBUS P Device power input - Connect 1-µF capacitor from VBUS to GND.
A3, B3, C3, D3 VOUT P Device power output - Connect 22-µF capacitor from VOUT to GND.
E3 VAC1 AI VAC1 input detection - Connected to VBUS if ACFET1 and RBFET1 are not used.
E2 VAC2 AI VAC2 input detection - Connected to VBUS if ACFET2 and RBFET2 are not used.
(1) Type: P = Power , AIO = Analog Input/Output , AI = Analog Input, DO = Digital Output, AO = Analog Output, DIO = Digital Input/Output