JAJSSA6 December   2023 BQ25960H

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 概要 (続き)
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Charging System
      2. 8.3.2  Battery Charging Profile
      3. 8.3.3  Device Power Up
      4. 8.3.4  Device HIZ State
      5. 8.3.5  Dual Input Bi-Directional Power Path Management
        1. 8.3.5.1 ACDRV Turn-On Condition
        2. 8.3.5.2 Single Input from VAC to VBUS without ACFET-RBFET
        3. 8.3.5.3 Single Input with ACFET1
        4. 8.3.5.4 Dual Input with ACFET1-RBFET1
        5. 8.3.5.5 Dual Input with ACFET1-RBFET1 and ACFET2-RBFET2
        6. 8.3.5.6 OTG and Reverse TX Mode Operation
      6. 8.3.6  Bypass Mode Operation
      7. 8.3.7  Charging Start-Up
      8. 8.3.8  Adapter Removal
      9. 8.3.9  Integrated 16-Bit ADC for Monitoring and Smart Adapter Feedback
      10. 8.3.10 Device Modes and Protection Status
        1. 8.3.10.1 Input Overvoltage, Overcurrent, Undercurrent, Reverse-Current and Short-Circuit Protection
        2. 8.3.10.2 Battery Overvoltage and Overcurrent Protection
        3. 8.3.10.3 IC Internal Thermal Shutdown, TSBUS, and TSBAT Temperature Monitoring
      11. 8.3.11 INT Pin, STAT, FLAG, and MASK Registers
      12. 8.3.12 Dual Charger Operation Using Primary and Secondary Modes
      13. 8.3.13 CDRVH and CDRVL_ADDRMS Functions
    4. 8.4 Programming
      1. 8.4.1 F/S Mode Protocol
    5. 8.5 Register Maps
      1. 8.5.1 I2C Registers
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Standalone Application Information (for use with main charger)
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 サード・パーティ製品に関する免責事項
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 サポート・リソース
    5. 12.5 Trademarks
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 用語集
  14. 13Revision History
  15. 14Mechanical, Packaging, and Orderable Information
    1. 14.1 Package Option Addendum
    2. 14.2 Tape and Reel Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3.10.2 Battery Overvoltage and Overcurrent Protection

BATOVP and BATOVP_ALM: The device integrates both overcurrent and overvoltage protection for the battery. The device monitors the battery voltage on BATP and BATN_SRP. In order to reduce the possibility of battery terminal shorts during manufacturing, 100-Ω series resistors on BATP is required. If external sense resistor is not used, place 100-Ω series resistors on BATN as well. The device is intended to be operated within the window formed by the BATOVP and BATOVP_ALM. When the BATOVP_ALM is reached, an interrupt is sent to the host to reduce the charge current and thereby not reaching the BATOVP threshold. If BATOVP is reached, the switched cap or bypass is disabled and CHG_EN is set to ‘0’, and the start-up sequence must be followed to resume charging. At the same time, BATOVP_STAT and BATOVP_FLAG are set to ‘1’, and INT is asserted low to alert the host (unless masked by BATOVP_MASK). BATOVP and BATOVP_ALM is disabled when BATOVP_DIS and BATOVP_ALM_DIS is set to ‘1’.

BATOCP and BATOCP_ALM: The device monitors current through the battery by monitoring the voltage across the external series battery sense resistor. The differential voltage of this sense resistor is measured on BATN_SRP and SRN_SYNCIN. The device is intended to be operated within the window formed by the BATOCP and BATOCP_ALM. When the BATOCP_ALM is reached, an interrupt is sent to the host to reduce the charge current from reaching the BATOCP threshold. If BATOCP is reached, the Switched Cap or Bypass is disabled after a deglitch time of tBATOCP and CHG_EN is set to ‘0’, and the start-up sequence must be followed to resume charging. At the same time, BATOCP_STAT and BATOCP_FLAG are set to ‘1’, and INT is asserted low to alert the host (unless masked by BATOCP_MASK). BATOCP and BATOCP_ALM is disabled when BATOCP_DIS and BATOCP_ALM_DIS is set to ‘1’.

VOUTOVP: The device also monitors output voltage between VOUT and ground in case of battery removal to protect the system. If VOUTOVP is reached and VOUTOVP_DIS=0, the Switched Cap or Bypass is disabled and CHG_EN is set to ‘0’, and the start-up sequence must be followed to resume charging. At the same time, VOUTOVP_STAT and VOUTOVP_FLAG is set to ‘1’, and INT is asserted low to alert the host (unless masked by VOUTOVP_MASK). If VOUTOVP_DIS =1, the protection is disabled.