SLUSBB3E December 2013 – January 2016
PRODUCTION DATA.
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
PIN | TYPE(1) | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
BAT | C2, C3 | PI, AI | LDO regulator input and battery voltage input. Connect to positive battery connector. For highest accuracy, use a Kelvin connection by directly routing to the PACK+ pin and minimizing current flow through the trace. Connect a capacitor (1 µF) between BAT and VSS. Place the capacitor close to gauge. |
BIN | B1 | DI | Battery insertion detection input. If Operation Configuration bit [BIE] = 1 (default), a logic low on the pin is detected as battery insertion. For a removable pack, the BIN pin can be connected to VSS through a pulldown resistor on the pack, typically the 10-kΩ thermistor; the system board should use a 1.8-MΩ pullup resistor to VDD to ensure the BIN pin is high when a battery is removed. If the battery is embedded in the system, it is recommended to leave [BIE] = 1 and use a 10-kΩ pulldown resistor from BIN to VSS. If [BIE] = 0, then the host must inform the gauge of battery insertion and removal with the BAT_INSERT and BAT_REMOVE subcommands. A 10-kΩ pulldown resistor should be placed between BIN and VSS, even if this pin is unused. NOTE: The BIN pin must not be shorted directly to VCC or VSS and any pullup resistor on the BIN pin must be connected only to the bq27621 VDD and not an external voltage rail. |
GPOUT | A1 | DO | This open-drain output can be configured to indicate BAT_LOW when the Operation Configuration [BATLOWEN] bit is set. By default [BATLOWEN] is cleared and this pin performs an interrupt function (SOC_INT) by pulsing for specific events, such as a change in State of Charge. Signal polarity for these functions is controlled by the [GPIOPOL] configuration bit. This pin should not be left floating, even if unused, so a 10-kΩ pullup resistor is recommended. If the device is in shutdown mode, then toggling GPOUT will make the gauge exit shutdown. Therefore, it is recommended to connect GPOUT to a GPIO of the host MSU. |
SCL | A3 | DIO | Slave I2C serial communications clock input line for communication with system (Master). Use with 10-kΩ pullup resistor (typical). |
SDA | A2 | DIO | Slave I2C serial communications data line for communication with system (Master). Open-drain I/O. Use with 10-kΩ pullup resistor (typical). |
VDD | B3 | PO | 1.8-V Regulator Output. Decouple with 0.47-μF ceramic capacitor to VSS. |
VSS | B2, C1 | PI | Ground pins. B2 is the actual device ground pin while C1 is floating internally. Therefore, C1 may be used as a bridge to connect to the board ground plane without requiring a via under the device package. Recommend routing B2 to C1 using a top-layer metal trace on the board. Connect to negative battery connector. For highest accuracy, use a Kelvin connection by directly routing to the PACK– pin and minimizing current flow through the trace. |