SLUSBB3E December   2013  – January 2016

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configurations and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Supply Current
    6. 7.6  Digital Input and Output DC Characteristics
    7. 7.7  LDO Regulator, Wake-up, and Auto-Shutdown DC Characteristics
    8. 7.8  ADC (Temperature and Cell Measurement) Characteristics
    9. 7.9  I2C-Compatible Interface Communication Timing Characteristics
    10. 7.10 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Data Commands
        1. 8.4.1.1 Standard Data Commands
        2. 8.4.1.2 Control(): 0x00 and 0x01
      2. 8.4.2 Alternate Chemistry Selection
      3. 8.4.3 Communications
        1. 8.4.3.1 I2C Interface
        2. 8.4.3.2 I2C Time Out
        3. 8.4.3.3 I2C Command Waiting Time
        4. 8.4.3.4 I2C Clock Stretching
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 BAT Voltage Sense Input
        2. 9.2.2.2 Integrated LDO Capacitor
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power Supply Decoupling
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • YZF|9
サーマルパッド・メカニカル・データ
発注情報

6 Pin Configurations and Functions

bq27621-G1 Pin_out.gif

Pin Functions

PIN TYPE(1) DESCRIPTION
NAME NO.
BAT C2, C3 PI, AI LDO regulator input and battery voltage input. Connect to positive battery connector. For highest accuracy, use a Kelvin connection by directly routing to the PACK+ pin and minimizing current flow through the trace. Connect a capacitor (1 µF) between BAT and VSS. Place the capacitor close to gauge.
BIN B1 DI Battery insertion detection input. If Operation Configuration bit [BIE] = 1 (default), a logic low on the pin is detected as battery insertion. For a removable pack, the BIN pin can be connected to VSS through a pulldown resistor on the pack, typically the 10-kΩ thermistor; the system board should use a 1.8-MΩ pullup resistor to VDD to ensure the BIN pin is high when a battery is removed. If the battery is embedded in the system, it is recommended to leave [BIE] = 1 and use a 10-kΩ pulldown resistor from BIN to VSS. If [BIE] = 0, then the host must inform the gauge of battery insertion and removal with the BAT_INSERT and BAT_REMOVE subcommands. A 10-kΩ pulldown resistor should be placed between BIN and VSS, even if this pin is unused.
NOTE: The BIN pin must not be shorted directly to VCC or VSS and any pullup resistor on the BIN pin must be connected only to the bq27621 VDD and not an external voltage rail.
GPOUT A1 DO This open-drain output can be configured to indicate BAT_LOW when the Operation Configuration [BATLOWEN] bit is set. By default [BATLOWEN] is cleared and this pin performs an interrupt function (SOC_INT) by pulsing for specific events, such as a change in State of Charge. Signal polarity for these functions is controlled by the [GPIOPOL] configuration bit. This pin should not be left floating, even if unused, so a 10-kΩ pullup resistor is recommended. If the device is in shutdown mode, then toggling GPOUT will make the gauge exit shutdown. Therefore, it is recommended to connect GPOUT to a GPIO of the host MSU.
SCL A3 DIO Slave I2C serial communications clock input line for communication with system (Master). Use with 10-kΩ pullup resistor (typical).
SDA A2 DIO Slave I2C serial communications data line for communication with system (Master). Open-drain I/O. Use with 10-kΩ pullup resistor (typical).
VDD B3 PO 1.8-V Regulator Output. Decouple with 0.47-μF ceramic capacitor to VSS.
VSS B2, C1 PI Ground pins. B2 is the actual device ground pin while C1 is floating internally. Therefore, C1 may be used as a bridge to connect to the board ground plane without requiring a via under the device package. Recommend routing B2 to C1 using a top-layer metal trace on the board. Connect to negative battery connector. For highest accuracy, use a Kelvin connection by directly routing to the PACK– pin and minimizing current flow through the trace.
(1) IO = Digital input-output, IA = Analog input, P = Power connection