JAJSEF8D March   2014  – January 2018

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     概略回路図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power-On Reset
    6. 6.6  2.5-V LDO Regulator
    7. 6.7  Charger Attachment and Removal Detection
    8. 6.8  CHG and DSG FET Drive
    9. 6.9  Overvoltage Protection (OVP)
    10. 6.10 Undervoltage Protection (UVP)
    11. 6.11 Overcurrent in Discharge (OCD)
    12. 6.12 Overcurrent in Charge (OCC)
    13. 6.13 Short-Circuit in Discharge (SCD)
    14. 6.14 Low Voltage Charging
    15. 6.15 Internal Temperature Sensor Characteristics
    16. 6.16 High-Frequency Oscillator
    17. 6.17 Low-Frequency Oscillator
    18. 6.18 Integrating ADC (Coulomb Counter) Characteristics
    19. 6.19 ADC (Temperature and Cell Voltage) Characteristics
    20. 6.20 Data Flash Memory Characteristics
    21. 6.21 Timing Requirements
    22. 6.22 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Configuration
      2. 7.3.2 Fuel Gauging
      3. 7.3.3 Power Modes
        1. 7.3.3.1 NORMAL Mode
        2. 7.3.3.2 SLEEP Mode
        3. 7.3.3.3 FULLSLEEP Mode
      4. 7.3.4 Li-Ion Battery Protector Description
        1. 7.3.4.1 High-Side NFET Charge and Discharge FET Drive
        2. 7.3.4.2 Protector Configuration
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operating Modes
        1. 7.4.1.1 NORMAL Mode
        2. 7.4.1.2 OVERVOLTAGE Mode
        3. 7.4.1.3 UNDERVOLTAGE Mode
        4. 7.4.1.4 OVERCURRENT IN CHARGE Mode
        5. 7.4.1.5 OVERCURRENT IN DISCHARGE and SHORT-CIRCUIT IN DISCHARGE Mode
        6. 7.4.1.6 SHUTDOWN WAIT Mode
          1. 7.4.1.6.1 ANALOG SHUTDOWN State
        7. 7.4.1.7 LOW VOLTAGE CHARGING State
      2. 7.4.2 Firmware Control of Protector
      3. 7.4.3 OVERTEMPERATURE FAULT Mode
      4. 7.4.4 Wake-Up Comparator
    5. 7.5 Battery Parameter Measurements
      1. 7.5.1 Charge and Discharge Counting
      2. 7.5.2 Voltage
      3. 7.5.3 Current
      4. 7.5.4 Auto-Calibration
      5. 7.5.5 Temperature
    6. 7.6 Communications
      1. 7.6.1 HDQ Single-Pin Serial Interface
      2. 7.6.2 I2C Interface
        1. 7.6.2.1 I2C Time Out
        2. 7.6.2.2 I2C Command Waiting Time
    7. 7.7 Standard Data Commands
      1. 7.7.1 Control(): 0x00 and 0x01
    8. 7.8 Extended Data Commands
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Pack-Side, Single-Cell Li-Ion Fuel Gauge and Protector
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1  BAT Voltage Sense Input
        2. 8.2.3.2  SRP and SRN Current Sense Inputs
        3. 8.2.3.3  Sense Resistor Selection
        4. 8.2.3.4  TS Temperature Sense Input
        5. 8.2.3.5  Thermistor Selection
        6. 8.2.3.6  VPWR Power Supply Input Filtering
        7. 8.2.3.7  REG25 LDO Output Filtering
        8. 8.2.3.8  Communication Interface Lines
        9. 8.2.3.9  PACKP Voltage Sense Input
        10. 8.2.3.10 CHG and DSG Charge Pump Voltage Outputs
        11. 8.2.3.11 NFET Selection
        12. 8.2.3.12 Additional ESD Protection Components
      4. 8.2.4 Application Curves
  9. 9 Power Supply Recommendation
    1. 9.1 Power Supply Decoupling
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Li-Ion Cell Connections
      2. 10.1.2 Sense Resistor Connections
      3. 10.1.3 Thermistor Connections
      4. 10.1.4 FET Connections
      5. 10.1.5 ESD Component Connections
      6. 10.1.6 High Current and Low Current Path Separation
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
      1. 11.1.1 関連資料
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.2.3.12 Additional ESD Protection Components

The additional capacitors placed across the CHG and DSF FET source pins as well as between PACK+ and ground help to bolster and greatly improve the ESD robustness of the pack design. The former components shunt damaging transients around the FETs and the latter components attempt to bypass such pulses to PACK– before they couple further into the battery pack PCB. Two series capacitors are used for each of these protection areas to prevent a battery short in the event of a single capacitor failure.