JAJSFO8B May   2018  – August 2019 BQ27Z561

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Supply Current
    6. 6.6  Internal 1.8-V LDO (REG18)
    7. 6.7  I/O (CE, PULS, INT)
    8. 6.8  Internal Temperature Sensor
    9. 6.9  NTC Thermistor Measurement Support
    10. 6.10 Coulomb Counter (CC)
    11. 6.11 Analog Digital Converter (ADC)
    12. 6.12 Internal Oscillator Specifications
    13. 6.13 Voltage Reference1 (REF1)
    14. 6.14 Voltage Reference2 (REF2)
    15. 6.15 Flash Memory
    16. 6.16 I2C I/O
    17. 6.17 I2C Timing — 100 kHz
    18. 6.18 I2C Timing — 400 kHz
    19. 6.19 HDQ Timing
    20. 6.20 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  BQ27Z561 Processor
      2. 7.3.2  Battery Parameter Measurements
        1. 7.3.2.1 Coulomb Counter (CC)
        2. 7.3.2.2 CC Digital Filter
        3. 7.3.2.3 ADC Multiplexer
        4. 7.3.2.4 Analog-to-Digital Converter (ADC)
        5. 7.3.2.5 Internal Temperature Sensor
        6. 7.3.2.6 External Temperature Sensor Support
      3. 7.3.3  Power Supply Control
      4. 7.3.4  Bus Communication Interface
      5. 7.3.5  Low Frequency Oscillator
      6. 7.3.6  High Frequency Oscillator
      7. 7.3.7  1.8-V Low Dropout Regulator
      8. 7.3.8  Internal Voltage References
      9. 7.3.9  Gas Gauging
      10. 7.3.10 Charge Control Features
      11. 7.3.11 Authentication
    4. 7.4 Device Functional Modes
      1. 7.4.1 Lifetime Logging Features
      2. 7.4.2 Configuration
        1. 7.4.2.1 Coulomb Counting
        2. 7.4.2.2 Cell Voltage Measurements
        3. 7.4.2.3 Auto Calibration
        4. 7.4.2.4 Temperature Measurements
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements (Default)
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Changing Design Parameters
      3. 8.2.3 Calibration Process
      4. 8.2.4 Gauging Data Updates
        1. 8.2.4.1 Application Curve
  9. 9 Power Supply Requirements
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
      1. 11.1.1 関連資料
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.17 I2C Timing — 100 kHz

PARAMETER TEST CONDITIONS MIN NOM MAX UNIT
fSCL Clock Operating Frequency SCL duty cycle = 50% 100 kHz
tHD:STA START Condition Hold Time 4.0 µs
tLOW Low period of the SCL Clock 4.7 µs
tHIGH High period of the SCL Clock 4.0 µs
tSU:STA Setup repeated START 4.7 µs
tHD:DAT Data hold time (SDA input) 0 ns
tSU:DAT Data setup time (SDA input) 250 ns
tr Clock Rise Time 10% to 90% 1000 ns
tf Clock Fall Time 90% to 10% 300 ns
tSU:STO Setup time STOP Condition 4.0 µs
tBUF Bus free time STOP to START 4.7 µs