JAJSNA7A November   2021  – February 2022 BQ27Z746

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configurations and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
      1. 6.5.1 Supply Current
      2. 6.5.2 Common Analog (LDO, LFO, HFO, REF1, REF2, I-WAKE)
      3. 6.5.3 Battery Protection (CHG, DSG)
      4. 6.5.4 Cell Sensing Output (BAT_SP, BAT_SN)
      5. 6.5.5 Gauge Measurements (ADC, CC, Temperature)
      6. 6.5.6 Flash Memory
    6. 6.6 Digital I/O: DC Characteristics
    7. 6.7 Digital I/O: Timing Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  BQ27Z746 Processor
      2. 7.3.2  Battery Parameter Measurements
        1. 7.3.2.1 Coulomb Counter (CC) and Digital Filter
        2. 7.3.2.2 ADC Multiplexer
        3. 7.3.2.3 Analog-to-Digital Converter (ADC)
        4. 7.3.2.4 Internal Temperature Sensor
        5. 7.3.2.5 External Temperature Sensor Support
      3. 7.3.3  Power Supply Control
      4. 7.3.4  Bus Communication Interface
      5. 7.3.5  Low Frequency Oscillator
      6. 7.3.6  High Frequency Oscillator
      7. 7.3.7  1.8-V Low Dropout Regulator
      8. 7.3.8  Internal Voltage References
      9. 7.3.9  Overcurrent in Discharge Protection
      10. 7.3.10 Overcurrent in Charge Protection
      11. 7.3.11 Short-Circuit Current in Discharge Protection
      12. 7.3.12 Primary Protection Features
      13. 7.3.13 Battery Sensing
      14. 7.3.14 Gas Gauging
      15. 7.3.15 Zero Volt Charging (ZVCHG)
      16. 7.3.16 Charge Control Features
      17. 7.3.17 Authentication
    4. 7.4 Device Functional Modes
      1. 7.4.1 Lifetime Logging Features
      2. 7.4.2 Configuration
        1. 7.4.2.1 Coulomb Counting
        2. 7.4.2.2 Cell Voltage Measurements
        3. 7.4.2.3 Auto Calibration
        4. 7.4.2.4 Temperature Measurements
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements (Default)
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Changing Design Parameters
      3. 8.2.3 Calibration Process
      4. 8.2.4 Gauging Data Updates
        1. 8.2.4.1 Application Curve
  9. 9 Power Supply Requirements
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Orderable, and Packaging Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configurations and Functions

Figure 5-1 Pinout Diagram
Table 5-1 Pin Functions
PIN DESCRIPTION
NAME NO. TYPE(1)
CHG A1 AO Charge FET (CHG) driver
DSG A2 AO Discharge FET (DSG) driver. Connect a series 10-MΩ typical resistor (RDSG) between DSG pin and PACK+ positive terminal.
PACK A3 IA Pack input voltage sensing pin. Connect a series 5-kΩ typical resistor (RPACK) between PACK pin and PACK+ positive terminal.
VDD B1 P LDO regulator input. Connect a 1-µF typical capacitor (CVDD) between VDD and VSS. Place the capacitor close to the gauge.
BAT B2 IA Battery voltage measurement sense input
BAT_SP B3 OA Cell sense output, positive
BAT_SN C3 OA Cell sense output, negative
TS C1 IA Thermistor input to ADC with internal 18-kΩ pullup resistor
GPO/TS1 C2 I/O General purpose output.
Optional TS1 ADC input channel with internal 18-kΩ pullup resistor
VSS D1 P Device ground
ENAB D2 I Active low digital input with weak internal pullup to VDD. If enabled for ultra-low power SHIP mode, driving this signal to the PACK– negative terminal will enable the device to wake up.
SDA D3 I/O Digital input, open drain output for I2C serial data. Use with a typical 10-kΩ pullup resistor.
SCL E3 I/O Digital input, open drain output for I2C serial clock. Use with a typical 10-kΩ pullup resistor.
SRP E1 IA This is the positive analog input pin connected to the internal coulomb-counter peripheral for integrating a small voltage between SRP (positive side) and SRN (negative side).
SRN E2 IA This is the negative analog input pin connected to the internal coulomb-counter peripheral for integrating a small voltage between SRP (positive side) and SRN (negative side).
(1) I/O = Digital input/output, IA = Analog input, AO= Analog output, P = Power connection