JAJSHO8T November   2013  – August 2022 BQ2961 , BQ2962

PRODMIX  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Pin Details
        1. 8.3.1.1 Input Sense Voltage, Vx
        2. 8.3.1.2 Output Drive, OUT
        3. 8.3.1.3 Supply Input, VDD
        4. 8.3.1.4 Regulated Supply Output, REG
      2. 8.3.2 Overvoltage Sensing for OUT
      3. 8.3.3 Regulated Output Voltage and REG_EN Pin
    4. 8.4 Device Functional Modes
      1. 8.4.1 NORMAL Mode
      2. 8.4.2 OVERVOLTAGE Mode
      3. 8.4.3 UNDERVOLTAGE Mode
      4. 8.4.4 CUSTOMER TEST MODE
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Third-Party Products Disclaimer
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Pin Configuration and Functions

GUID-B0E59DD4-7110-401A-9E87-5183E4F93493-low.gif Figure 6-1 2-Series to 4-Series BQ2961(Top View)
GUID-A915593B-3467-4148-A0AF-2DB58B45930E-low.gif Figure 6-2 2-Series to 4-Series BQ2962(Top View)
Table 6-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME BQ2961 BQ2962
OUT 8 7 OA Analog output drive for an overvoltage fault signal; CMOS output high or open-drain active low
PWPD 9 9 P TI recommends connecting the exposed pad to VSS on PCB.
REG 7 8 OA Regulated supply output. Requires an external ceramic capacitor for stability
REG_EN — — IA Regulated supply output enable. A "high" to enable REG output and "low" to disable REG output
V1 5 5 IA Sense input for positive voltage of the lowest cell from the bottom of the stack
V2 4 4 IA Sense input for positive voltage of the second cell from the bottom of the stack
V3 3 3 IA Sense input for positive voltage of the third cell from the bottom of the stack
V4 2 2 IA Sense input for positive voltage of the fourth cell from the bottom of the stack
VDD 1 1 P Power supply input
VSS 6 6 P Electrically connected to integrated circuit ground and negative terminal of the lowest cell in the stack
(1) IA = Analog input, OA = Analog Output, P = Power connection