JAJSFJ5I March   2014  – August 2024 BQ2970 , BQ2971 , BQ2972 , BQ2973

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
    1. 5.1 Pin Descriptions
      1. 5.1.1 Supply Input: BAT
      2. 5.1.2 Cell Negative Connection: VSS
      3. 5.1.3 Voltage Sense Node: V–
      4. 5.1.4 Discharge FET Gate Drive Output: DOUT
      5. 5.1.5 Charge FET Gate Drive Output: COUT
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 DC Characteristics
    6. 6.6 Programmable Fault Detection Thresholds
    7. 6.7 Programmable Fault Detection Timer Ranges
    8. 6.8 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1 Timing Charts
    2. 7.2 Test Circuits
    3. 7.3 Test Circuit Diagrams
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Normal Operation
      2. 8.4.2 Overcharge Status
      3. 8.4.3 Over-Discharge Status
      4. 8.4.4 Discharge Overcurrent Status (Discharge Overcurrent, Load Short-Circuit)
      5. 8.4.5 Charge Overcurrent Status
      6. 8.4.6 0V Charging Function Enabled
      7. 8.4.7 0V Charging Inhibit Function
      8. 8.4.8 Delay Circuit
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Performance Plots
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Related Documentation
    2. 10.2 サポート・リソース
    3. 10.3 Trademarks
    4. 10.4 静電気放電に関する注意事項
    5. 10.5 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5.1.5 Charge FET Gate Drive Output: COUT

This pin is an output to control the charge FET. The output is driven from an internal circuitry connected to the BAT supply. This output transitions from high to low when a fault is detected, and requires the CHG FET to turn OFF. A 5MΩ high impedance resistor is connected from COUT to Pack– for gate capacitance discharge when FET is turned OFF.