JAJSFJ5I
March 2014 – August 2024
BQ2970
,
BQ2971
,
BQ2972
,
BQ2973
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Device Comparison Table
5
Pin Configuration and Functions
5.1
Pin Descriptions
5.1.1
Supply Input: BAT
5.1.2
Cell Negative Connection: VSS
5.1.3
Voltage Sense Node: V–
5.1.4
Discharge FET Gate Drive Output: DOUT
5.1.5
Charge FET Gate Drive Output: COUT
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
DC Characteristics
6.6
Programmable Fault Detection Thresholds
6.7
Programmable Fault Detection Timer Ranges
6.8
Typical Characteristics
7
Parameter Measurement Information
7.1
Timing Charts
7.2
Test Circuits
7.3
Test Circuit Diagrams
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.4
Device Functional Modes
8.4.1
Normal Operation
8.4.2
Overcharge Status
8.4.3
Over-Discharge Status
8.4.4
Discharge Overcurrent Status (Discharge Overcurrent, Load Short-Circuit)
8.4.5
Charge Overcurrent Status
8.4.6
0V Charging Function Enabled
8.4.7
0V Charging Inhibit Function
8.4.8
Delay Circuit
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Performance Plots
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Related Documentation
10.2
サポート・リソース
10.3
Trademarks
10.4
静電気放電に関する注意事項
10.5
用語集
11
Revision History
12
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DSE|6
MPDS287A
サーマルパッド・メカニカル・データ
発注情報
jajsfj5i_oa
jajsfj5i_pm
9.2
Typical Application
The 5-M resistor for an external gate-source is optional.
Figure 9-1
Typical Application Schematic, BQ2970