JAJSDZ8C June 2017 – April 2021 BQ40Z50-R2
PRODUCTION DATA
MIN | NOM | MAX | UNIT | |||
---|---|---|---|---|---|---|
fSMB | SMBus operating frequency | SLAVE mode, SMBC 50% duty cycle | 10 | 100 | kHz | |
fMAS | SMBus master clock frequency | MASTER mode, no clock low slave extend | 51.2 | kHz | ||
tBUF | Bus free time between start and stop | 4.7 | µs | |||
tHD(START) | Hold time after (repeated) start | 4.0 | µs | |||
tSU(START) | Repeated start setup time | 4.7 | µs | |||
tSU(STOP) | Stop setup time | 4.0 | µs | |||
tHD(DATA) | Data hold time | 300 | ns | |||
tSU(DATA) | Data setup time | 250 | ns | |||
tTIMEOUT | Error signal detect time | 25 | 35 | ms | ||
tLOW | Clock low period | 4.7 | µs | |||
tHIGH | Clock high period | 4.0 | 50 | µs | ||
tR | Clock rise time | 10% to 90% | 1000 | ns | ||
tF | Clock fall time | 90% to 10% | 300 | ns | ||
tLOW(SEXT) | Cumulative clock low slave extend time | 25 | ms | |||
tLOW(MEXT) | Cumulative clock low master extend time | 10 | ms |