SLUSBS8B December 2013 – November 2019 BQ40Z50
PRODUCTION DATA.
The PACK and VCC inputs provide power to the BQ40Z50 from the charger. The PACK input also provides a method to measure and detect the presence of a charger. The PACK input uses a 100-Ω resistor; whereas, the VCC input uses a diode to guard against input transients and prevents mis-operation of the date driver during short-circuit events.
The N-channel charge and discharge FETs are controlled with 5.1-kΩ series gate resistors, which provide a switching time constant of a few microseconds. The 10-MΩ resistors ensure that the FETs are off in the event of an open connection to the FET drivers. Q4 is provided to protect the discharge FET (Q3) in the event of a reverse-connected charger. Without Q4, Q3 can be driven into its linear region and suffer severe damage if the PACK+ input becomes slightly negative.
Q4 turns on in that case to protect Q3 by shorting its gate to source. To use the simple ground gate circuit, the FET must have a low gate turn-on threshold. If it is desired to use a more standard device, such as the 2N7002 as the reference schematic, the gate should be biased up to 3.3 V with a high-value resistor. The BQ40Z50 device has the capability to provide a current-limited charging path typically used for low battery voltage or low temperature charging. The BQ40Z50 device uses an external P-channel, pre-charge FET controlled by PCHG.