6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
|
MIN |
MAX |
UNIT |
Voltage |
Applied at VCC to VSS |
–0.3 |
4.1 |
V |
Applied to any pin (excluding VCORE)(2) |
–0.3 |
VCC + 0.3 |
V |
Diode current at any device pin |
–2 |
2 |
mA |
Maximum junction temperature, TJ |
|
95(3) |
°C |
Storage temperature, Tstg |
–55 |
95 |
°C |
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages referenced to VSS. VCORE is for internal device use only. No external DC loading or voltage should be applied.
(3) It is recommended to follow the current JEDEC J-STD-020 specification with peak reflow temperatures not higher than classified on the device label on the shipping boxes or reels. In general, hand soldering is not recommended. However, if hand soldering is required for application prototyping, peak temperature must not exceed 250°C for longer than 30 seconds durations. In addition, during storage, the maximum storage temperature of 95°C should not be exceeded.
6.2 ESD Ratings
|
VALUE |
UNIT |
V(ESD) |
Electrostatic discharge |
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) |
1000 |
V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) |
250 |
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
|
MIN |
NOM |
MAX |
UNIT |
VCC |
Supply voltage during program execution and FRAM programming (AVCC = DVCC)(1) |
2 |
|
3.6 |
V |
VSS |
Supply voltage (AVSS = DVSS) |
|
0 |
|
V |
TA |
Operating free-air temperature |
–40 |
|
85 |
°C |
TJ |
Operating free-air temperature |
–40 |
|
85 |
°C |
C(VCORE) |
Required capacitor at VCORE(2) |
|
470 |
|
nF |
C(VCC)/C(VCORE) |
Capacitor ratio of VCC to VCORE |
10 |
|
|
nF |
(1) TI recommends to power AVCC and DVCC from the same source. A maximum difference of 0.3 V between AVCC and DVCC can be tolerated during power up and operation.
(2) A capacitor tolerance of ±20% or better is required.