JAJSCB2 データシート

JAJSCB2K April 2020 – July 2020 BQ77904 , BQ77905

PRODUCTION DATA

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

PW|20
- MPDS362A

サーマルパッド・メカニカル・データ

発注情報

8.3.3 Protection Response and Recovery Summary

Table 8-3 summarizes how each fault condition affects the state of the DSG and CHG output signals, as well as the recovery conditions required to resume charging and/or discharging. As a rule, the CHG and DSG output drivers are enabled only when no respective fault conditions are present. When multiple simultaneous faults (such as an OV and OTD) are present, all faults must be cleared before the FET can resume operation.

Table 8-3 Fault Condition, State, and Recovery Methods

FAULT	FAULT TRIGGER CONDITION	CHG	DSG	RECOVERY METHOD	TRIGGER DELAY	RECOVERY DELAY
CTRC disabled	CTRC disabled for deglitch delay time	OFF	—	CTRC must be enabled for deglitch delay time	t_{CTRDEG_ON}	t_{CTRDEG_OFF}
CTRD disabled	CTRD disabled for deglitch delay time	—	OFF	CTRD must be enabled for deglitch delay time	t_{CTRDEG_ON}	t_{CTRDEG_OFF}
OV	V(Cell) rises above V_OV for delay time	OFF	—	V(Cell) drops below V_OV – V_{HYS_OV} for delay	t_{OVn_DELAY}
UV	V(Cell) drops below V_UV for delay time	—	OFF	V(Cell) rises above V_UV + V_{HYS_UV} for delay	t_{UVn_DELAY}
OW	VC_X – VC_X–1 < V_OW for delay time	OFF	OFF	Bad VC_X recovers such that VC_X – VC_X–1 > V_OW + V_{OW_HYS} for delay	t_{OWn_DELAY}
OCD1, OCD2, SCD	(VSRP - VSRN) < VOCD1, VOCD2, or VSCD for delay time	OFF	OFF	Recovery delay expires OR LD detects < V_LDT OR Recovery delay expires + LD detects < V_LDT	t_{OCD1_DELAY,} t_{OCD2_DELAY,} t_{SCD_DELAY,}	t_{CD_REC}
OTC⁽¹⁾	Temperature rises above T_OTC for delay time	OFF	—	Temp drops below T_OTC – T_{OTC_REC} for delay	t_{OTC_DELAY}
OTD⁽¹⁾	Temperature rises above T_OTD for delay time	OFF	OFF	Temp drops below T_OTD – T_{OTD_REC} for delay	t_{OTD_DELAY}
UTC⁽¹⁾	Temperature drops below T_UTC for delay time	OFF	—	Temperature rises above T_UTC + T_{UTC_REC} for delay	t_{UTC_DELAY}
UTD⁽¹⁾	Temp drops below T_UTD for delay time	OFF	OFF	Temp rises above T_UTD + T_{UTD_REC} for delay	t_{UTD_DELAY}

(1) T_UTC, T_UTD, T_{UTC_REC}, and T_{UTD_REC} correspond to the temperature produced by V_UTC, V_UTD, V_{UTC_REC}, and V_{UTD_REC} of the selected thermistor resistance.

For BQ77904 and BQ77905 devices to prevent CHG FET damage, there are times when the CHG FET may be enabled even though an OV, UTC, OTC, or CTRC low event has occurred. See the State Comparator section for details.