JAJSGH5B August   2015  – November 2018

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: Supply Current
    6. 7.6  Electrical Characteristics: I/O
    7. 7.7  Electrical Characteristics: ADC
    8. 7.8  Electrical Characteristics: Power-On Reset
    9. 7.9  Electrical Characteristics: Oscillator
    10. 7.10 Electrical Characteristics: Data Flash Memory
    11. 7.11 Electrical Characteristics: Register Backup
    12. 7.12 SMBus Timing Specifications
    13. 7.13 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Primary (1st Level) Safety Features
      2. 8.3.2 Secondary (2nd Level) Safety Features
      3. 8.3.3 Charge Control Features
      4. 8.3.4 Fuel Gauging
      5. 8.3.5 Lifetime Data Logging
      6. 8.3.6 Authentication
      7. 8.3.7 Battery Parameter Measurements
        1. 8.3.7.1 Current and Coulomb Counting
        2. 8.3.7.2 Voltage
        3. 8.3.7.3 Temperature
    4. 8.4 Device Functional Modes
    5. 8.5 Programming
      1. 8.5.1 Physical Interface
      2. 8.5.2 SMBus Address
      3. 8.5.3 SMBus On and Off State
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Schematic
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
        1. 9.2.3.1 Measurement System
          1. 9.2.3.1.1 Cell Voltages
          2. 9.2.3.1.2 External Average Cell Voltage
          3. 9.2.3.1.3 Current
          4. 9.2.3.1.4 Temperature
        2. 9.2.3.2 Gas Gauging
        3. 9.2.3.3 Charging
          1. 9.2.3.3.1 Fast Charging Voltage
          2. 9.2.3.3.2 Fast Charging Current
          3. 9.2.3.3.3 Other Charging Modes
        4. 9.2.3.4 Protection
        5. 9.2.3.5 Peripheral Features
          1. 9.2.3.5.1 LED Display
          2. 9.2.3.5.2 SMBus Address
      4. 9.2.4 Application Performance Plots
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Power Supply Decoupling Capacitor
      2. 11.1.2 MRST Connection
      3. 11.1.3 Communication Line Protection Components
      4. 11.1.4 ESD Spark Gap
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 関連資料
    2. 12.2 コミュニティ・リソース
    3. 12.3 商標
    4. 12.4 静電気放電に関する注意事項
    5. 12.5 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.5.3 SMBus On and Off State

The bq78350-R1 device detects an SMBus off state when SMBC and SMBD are logic-low for ≥ 2 seconds. Clearing this state requires either SMBC or SMBD to transition high. Within 1 ms, the communication bus is available.