JAJSP77A November   2019  – August 2020 BQ79600-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 仕様
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Functional Modes and Power Supply
        1. 7.3.1.1 Power Mode
        2. 7.3.1.2 Pings
        3. 7.3.1.3 SPI/UART の選択
        4. 7.3.1.4 Digital Reset
        5. 7.3.1.5 Power Mode in BMS System
        6. 7.3.1.6 Power Supply
        7. 7.3.1.7 Shutdown
      2. 7.3.2 Communication
        1. 7.3.2.1 Data Communication Protocol
          1. 7.3.2.1.1 Frame Layer
            1. 7.3.2.1.1.1 Calculating Frame CRC Value
            2. 7.3.2.1.1.2 Verifying Frame CRC
          2. 7.3.2.1.2 Physical Layer
            1. 7.3.2.1.2.1 UART
              1. 7.3.2.1.2.1.1 TX HOLD OFF
              2. 7.3.2.1.2.1.2 UART COMM CLEAR
            2. 7.3.2.1.2.2 SPI
              1. 7.3.2.1.2.2.1 SPI_RDY と SPI FIFO
              2. 7.3.2.1.2.2.2 Flow to Read/Write BQ79600-Q1
              3. 7.3.2.1.2.2.3 SPI COMM CLEAR
            3. 7.3.2.1.2.3 Daisy Chain
        2. 7.3.2.2 Tone Communication Protocol
        3. 7.3.2.3 Device Auto Addressing / Ring Communication
          1. 7.3.2.3.1 Auto-Addressing
          2. 7.3.2.3.2 Ring Communication (optional)
        4. 7.3.2.4 Communication Timeout
        5. 7.3.2.5 Communication Debug Mode
      3. 7.3.3 Fault Handling
        1. 7.3.3.1 Fault Status Hierarchy/Reset/Mask
          1. 7.3.3.1.1 Fault Status Hierarchy
          2. 7.3.3.1.2 Fault Reset and Mask
        2. 7.3.3.2 Fault Interface
          1. 7.3.3.2.1 NFAULT
          2. 7.3.3.2.2 Daisy Chain (COMH and COML)
            1. 7.3.3.2.2.1 Fault Transmitting when BQ79600-Q1 in ACTIVE
            2. 7.3.3.2.2.2 Fault Transmitting when BQ79600-Q1 in SLEEP
            3. 7.3.3.2.2.3 Fault Transmitting (Automatic Host Wakeup/Reverse Wakeup) when BQ79600-Q1 in SHUTDOWN
      4. 7.3.4 INH/ Reverse Wakeup
      5. 7.3.5 Sniff Detector
      6. 7.3.6 Device Diagnostic
        1. 7.3.6.1 Power Supplies Check
          1. 7.3.6.1.1 Power Supply Diagnostic Check
          2. 7.3.6.1.2 Power Supply BIST
        2. 7.3.6.2 Thermal Shutdown
        3. 7.3.6.3 Oscillators Watchdog
        4. 7.3.6.4 Register Bit Flip Monitor
        5. 7.3.6.5 SPI FIFO 診断
    4. 7.4 Device Functional Modes
    5. 7.5 Register Maps
      1. 7.5.1  Register Summary Table
      2. 7.5.2  Register: DIR0_ADDR
      3. 7.5.3  Register: DIR1_ADDR
      4. 7.5.4  Register: CONTROL1
      5. 7.5.5  Register: CONTROL2
      6. 7.5.6  Register: DIAG_CTRL
      7. 7.5.7  Register: DEV_CONF1
      8. 7.5.8  Register: DEV_CONF2
      9. 7.5.9  Register: TX_HOLD_OFF
      10. 7.5.10 Register: SLP_TIMEOUT
      11. 7.5.11 Register: COMM_TIMEOUT
      12. 7.5.12 Register: SPI_FIFO_UNLOCK
      13. 7.5.13 Register: FAULT_MSK
      14. 7.5.14 Register: FAULT_RST
      15. 7.5.15 Register: FAULT_SUMMARY
      16. 7.5.16 Register: FAULT_REG
      17. 7.5.17 Register: FAULT_SYS
      18. 7.5.18 Register: FAULT_PWR
      19. 7.5.19 Register: FAULT_COMM1
      20. 7.5.20 Register: FAULT_COMM2
      21. 7.5.21 Register: DEV_DIAG_STAT
      22. 7.5.22 Register: PARTID
      23. 7.5.23 Register: DIE_ID1
      24. 7.5.24 Register: DIE_ID2
      25. 7.5.25 Register: DIE_ID3
      26. 7.5.26 Register: DIE_ID4
      27. 7.5.27 Register: DIE_ID5
      28. 7.5.28 Register: DIE_ID6
      29. 7.5.29 Register: DIE_ID7
      30. 7.5.30 Register: DIE_ID8
      31. 7.5.31 Register: DIE_ID9
      32. 7.5.32 Register: DEBUG_CTRL_UNLOCK
      33. 7.5.33 Register: DEBUG_COMM_CTRL
      34. 7.5.34 Register: DEBUG_COMM_STAT
      35. 7.5.35 Register: DEBUG_SPI_PHY
      36. 7.5.36 Register: DEBUG_SPI_FRAME
      37. 7.5.37 Register: DEBUG_UART_FRAME
      38. 7.5.38 Register: DEBUG_COMH_PHY
      39. 7.5.39 Register: DEBUG_COMH_FRAME
      40. 7.5.40 Register: DEBUG_COML_PHY
      41. 7.5.41 Register: DEBUG_COML_FRAME
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Bridge With Reverse Wakeup in UART
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 MCU Interface (UART, NFAULT)
          2. 8.2.1.2.2 Daisy Chain Interface
          3. 8.2.1.2.3 INH Connection
        3. 8.2.1.3 Application Performance Plot
      2. 8.2.2 Bridge Without Reverse Wakeup in SPI
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 MCU Interface (SPI, SPI_RDY, NFAULT)
          2. 8.2.2.2.2 Daisy Chain Interface
        3. 8.2.2.3 Application Performance Plot
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Ground Planes
      2. 10.1.2 Bypass Capacitors for Power Supplies
      3. 10.1.3 UART/SPI communication
      4. 10.1.4 Daisy Chain Communication
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
    2. 11.2 Third-Party Products Disclaimer
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.5 Electrical Characteristics

VIO = 3.3V, over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OPERATION VOLTAGE
VBAT When reverse wakeup feature is used, BAT pin is powered by "12V battery" 5.5 24 V
VBAT When reverse wakeup feature is not used, BAT/CVDD are powered by regulated 5V 4.75 5.25 V
THERMAL SHUTDOWN
TSHUT_R Thermal shutdown (rising direction) DieTemp sensor 126 138 150 °C
TSHUT_F Thermal shutdown (falling direction) DieTemp sensor 116 141 °C
SUPPLY CURRENTS
ISHDN_1 Supply current in SHUTDOWN mode device powered by regulated 5V supply VBAT shorted to CVDD, both equal to 5V, measured through GND pin 7 µA
ISHDN_2 Supply current in SHUTDOWN mode powered by "12V" battery directly VBAT= 17V, CVDD self powered, measured through GND pin 9 µA
IVALIDATE Supply current in VALIDATE mode Current on BAT pin 168 µA
ISLP(IDLE) Baseline supply current in SLEEP mode Current on BAT pin, no fault, COMH and COML RX disabled, no HB TX 110 µA
ISLP_RX_ON Additional supply current to SLEEP mode base line When COML OR COMH RX is on 35 µA
ISLP_TX_ON Additional supply current to SLEEP mode base line When COML or COMH tone transmiter is on (HB tone) 8 µA
IACT(IDLE) Baseline supply current in ACTIVE mode Current on BAT pin,  no fault, no communication, Tone RX/TX is off 3 4 mA
ICOMT Additional average current for one of BQ79600 daisy chain transmitters is on Average current into VBAT when BQ79600 transmits 14 bytes of data (brdcast write 8 bytes of 0x00 into address 0X1B) 10 mA
Supplies (AVAO_REF, always on internal supply)
VAVAOREG AVAOREG voltage VBAT > min VBAT 2.45 V
VAVDDREF_OV AVDDREF OV threshold VBAT > min VBAT, hys = 130mV 2.8 3.1 V
Supplies (CVDD)
VCVDD CVDD output voltage No external load, CSUPPLIES = 0.22µF, ACTIVE mode 4.9 5 5.1 V
VCVDD_OV CVDD OV rising threshold Hys = 140mV 5.3 5.5 5.65 V
VCVDD_UV_F CVDD UV falling threshold 4.35 4.5 4.65 V
VCVDD_UV_R CVDD UV rising threshold 4.45 4.6 4.75 V
VCVDD_ILIMIT CVDD current limit 53 81 mA
CCVDD Capacitance range on CVDD pin Not capacitor value 0.1 0.8 µF
Supplies (DVDD)
VDVDD DVDD output voltage No external load, CSUPPLIES = 0.22µF, ACTIVE mode 1.75 1.8 1.85 V
VDVDD_OV DVDD OV rising threshold Hys = 65mV 1.9 2.1 V
VDVDD_UV_F DVDD UV falling threshold 1.63 1.69 V
VDVDD_UV_R DVDD UV rising threshold 1.68 1.75 V
VDVDD_ILIMIT DVDD current limit 20 57 mA
DDVDD Load capacitance on DVDD pin Not capacitor value 0.1 0.8 µF
SNIFF DETECTOR
VVAL_THR_P Sniffer detector threshold,  rising swing on COMHP has to be larger than value  Sniffer is enabled, and device is in SHUTDOWN mode 3.2 3.6 V
INH Driver
VDROP_INH When INH is pulled up, voltage drop from BAT to INH IINH = -0.5mA 0.5 1 V
VINH_DET Threshold to set [INH_STAT] to '1' 2.2 V
Reference Voltages
Digital I/Os (TX, RX, NFAULT)
VVIO_UV_R VIO UV rising Hys = 200mV 2.5 3.1 V
VOH Output as logic level high (TX) FET pull up, Iout=1mA, VIO = 3.3V or 5V VVIO–0.1 V
VOL Output as logic level low (TX) FET pull down, Iout=1mA, VIO = 3.3V or 5V 0.1 V
VIH Input as logic level high (RX), requirement for user VIO = 3.3V or 5V 0.75 x VVIO V
VIL Input as logic level low (RX), requirement for user VIO = 3.3V or 5V 0.25 x VVIO V
RNFAULT NFAULT pull down impedance Use 100kohm external pull up 1000 Ω
Daisy-chain Communication Bus
VDCCM_1 Common mode voltage (COML and COMH) ACTIVE mode 2.2 V
VDCCM_2 Common mode voltage (COML and COMH) SLEEP or VALIDATE mode 1 V
VCOMM_DATA COMM port data receiver threshold range (VCOMP-VCOMN) 1.04 1.75 V
VCOMM_TONE COMM port HB/FAULT tone receiver threshold range (VCOMP-VCOMN) 1.13 1.94 V