JAJSL83D August 2020 – September 2022 BQ79612-Q1 , BQ79614-Q1 , BQ79616-Q1
PRODUCTION DATA
Address | 0x0000 | |||||||
NVM | Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
Name | SPARE[1:0] | ADDRESS[5:0] | ||||||
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
SPARE[1:0] = | Spare | |||||||
ADDRESS[5:0] = | This register shows the default device address used when [DIR_SEL] = 0 and programmed in the OTP. Writing to this register won’t change the device address actively in use. This register is used for the system to program the device address to OTP, which will be loaded to the DIR0_ADDR register at POR. For programming, follow the OTP programming procedure. |