JAJSMA5C June   2021  – March 2022 BUF802

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 説明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: Wide Bandwidth Mode
    6. 6.6 Electrical Characteristics: Low Quiescent Current Mode
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input and Output Over-Voltage Clamp
      2. 8.3.2 Adjustable Quiescent Current
      3. 8.3.3 ESD Structure
    4. 8.4 Device Functional Modes
      1. 8.4.1 Buffer Mode (BF Mode)
      2. 8.4.2 Composite Loop Mode (CL Mode)
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Oscilloscope Front-End Amplifier Design
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Transforming a Wide-Bandwidth, 50 Ω Input Signal Chain to High-Input Impedance
        1. 9.2.2.1 Detailed Design Results
        2. 9.2.2.2 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.4.1 Buffer Mode (BF Mode)

GUID-20210225-CA0I-LBXM-SKR6-ZN2S2RZDLQFS-low.gifFigure 8-10 Internal Schematic – BF Mode

The wide large-signal bandwidth and fast slew rate of the BUF802 coupled with Hi-Z input are useful in a variety of high-frequency signal chain applications. As shown in Figure 8-10 the BUF802 uses the Main Path and operates the JFET and transistors as source follower and emitter followers to reproduce signal applied on IN, at the output of BUF802. The pins associated with only CL Mode (Pin No. 6, 4, and 3) are left floating while operating in BF Mode.

Figure 8-11 Composite Loop Using BF Mode

Figure 8-11 shows how the BUF802 can also be used in a composite loop while being operated in BF Mode. The operation of BUF802 in Figure 8-11 would still be called BF Mode since the signal is being transferred through the Main Path only. The Auxiliary path and the pins associated with the Auxiliary path and CL Mode are kept disabled. The low-frequency and high-frequency signal components are combined externally through the discrete components R1 and C1 prior to being applied at the IN pin.