JAJSQN1B December   2022  – April 2024 CC1314R10

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 機能ブロック図
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
    1. 6.1 Pin Diagram—RGZ Package (Top View)
    2. 6.2 Signal Descriptions—RGZ Package
    3. 6.3 Connections for Unused Pins and Modules—RGZ Package
    4. 6.4 Pin Diagram—RSK Package (Top View)
    5. 6.5 Signal Descriptions—RSK Package
    6. 6.6 Connection of Unused Pins and Module—RSK Package
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Power Supply and Modules
    5. 7.5  Power Consumption—Power Modes
    6. 7.6  Power Consumption—Radio Modes
    7. 7.7  Nonvolatile (Flash) Memory Characteristics
    8. 7.8  Thermal Resistance Characteristics
    9. 7.9  RF Frequency Bands
    10. 7.10 861MHz to 1054MHz—Receive (RX)
    11. 7.11 861MHz to 1054MHz—Transmit (TX) 
    12. 7.12 861MHz to 1054MHz - PLL Phase Noise Wideband Mode
    13. 7.13 861MHz to 1054MHz - PLL Phase Noise Narrowband Mode
    14. 7.14 Timing and Switching Characteristics
      1. 7.14.1 Reset Timing
      2. 7.14.2 Wakeup Timing
      3. 7.14.3 Clock Specifications
        1. 7.14.3.1 48MHz Clock Input (TCXO)
        2. 7.14.3.2 48MHz Crystal Oscillator (XOSC_HF)
        3. 7.14.3.3 48MHz RC Oscillator (RCOSC_HF)
        4. 7.14.3.4 2MHz RC Oscillator (RCOSC_MF)
        5. 7.14.3.5 32.768 kHz Crystal Oscillator (XOSC_LF)
        6. 7.14.3.6 32 kHz RC Oscillator (RCOSC_LF)
      4. 7.14.4 Serial Peripheral Interface (SPI) Characteristics
        1. 7.14.4.1 SPI Characteristics
        2. 7.14.4.2 SPI Master Mode
        3. 7.14.4.3 SPI Master Mode Timing Diagrams
        4. 7.14.4.4 SPI Slave Mode
        5. 7.14.4.5 SPI Slave Mode Timing Diagrams
      5. 7.14.5 UART
        1. 7.14.5.1 UART Characteristics
    15. 7.15 Peripheral Characteristics
      1. 7.15.1 ADC
        1. 7.15.1.1 Analog-to-Digital Converter (ADC) Characteristics
      2. 7.15.2 DAC
        1. 7.15.2.1 Digital-to-Analog Converter (DAC) Characteristics
      3. 7.15.3 Temperature and Battery Monitor
        1. 7.15.3.1 Temperature Sensor
        2. 7.15.3.2 Battery Monitor
      4. 7.15.4 Comparators
        1. 7.15.4.1 Low-Power Clocked Comparator
        2. 7.15.4.2 Continuous Time Comparator
      5. 7.15.5 Current Source
        1. 7.15.5.1 Programmable Current Source
      6. 7.15.6 GPIO
        1. 7.15.6.1 GPIO DC Characteristics
    16. 7.16 Typical Characteristics
      1. 7.16.1 MCU Current
      2. 7.16.2 RX Current
      3. 7.16.3 TX Current
      4. 7.16.4 RX Performance
      5. 7.16.5 TX Performance
      6. 7.16.6 ADC Performance
  9. 8 Detailed Description
    1. 8.1  Overview
    2. 8.2  System CPU
    3. 8.3  Radio (RF Core)
      1. 8.3.1 Proprietary Radio Formats
    4. 8.4  Memory
    5. 8.5  Sensor Controller
    6. 8.6  Cryptography
    7. 8.7  Timers
    8. 8.8  Serial Peripherals and I/O
    9. 8.9  Battery and Temperature Monitor
    10. 8.10 µDMA
    11. 8.11 Debug
    12. 8.12 Power Management
    13. 8.13 Clock Systems
    14. 8.14 Network Processor
  10. 9 Application, Implementation, and Layout
    1. 9.1 Reference Designs
    2. 9.2 Junction Temperature Calculation
  11. 10Device and Documentation Support
    1. 10.1 Tools and Software
      1. 10.1.1 SimpleLink™ Microcontroller Platform
    2. 10.2 Documentation Support
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Packaging Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.11 861MHz to 1054MHz—Transmit (TX) 

When measured on the LP-EM-CC1314R10 reference design with Tc = 25°C, VDDS = 3.0V with
DC/DC enabled unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX path.  All measurements are performed conducted. (1)
 
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
General parameters
Max output power, boost mode VDDR = 1.95V
Minimum supply voltage (VDDS ) for boost mode is 2.1V
868MHz and 915MHz		 14 dBm
Max output power 868MHz and 915MHz 12 dBm
Output power programmable range 868MHz and 915MHz, 1dB step size. 34 dB
Output power variation over temperature +10dBm setting
Over recommended temperature operating range		 ±2 dB
Output power variation over temperature Boost mode +14dBm setting
Over recommended temperature operating range		 ±1.5 dB
Spurious emissions and harmonics
Spurious emissions (excluding harmonics)(2) 30MHz to 1GHz +14dBm setting
ETSI restricted bands		 < –54 dBm
+14dBm setting
ETSI outside restricted bands		 < –36 dBm
1GHz to 12.75GHz
(outside ETSI restricted bands)		 +14dBm setting
measured in 1MHz bandwidth (ETSI)		 < –30 dBm
Spurious emissions out-of-band, 915MHz(2) 30MHz to 88MHz
(within FCC restricted bands)		 +14dBm setting < –56 dBm
88MHz to 216MHz
(within FCC restricted bands)		 +14dBm setting < –52 dBm
216MHz to 960MHz
(within FCC restricted bands)		 +14dBm setting < –50 dBm
960MHz to 2390MHz and above 2483.5MHz (within FCC restricted band) +14dBm setting < –42 dBm
1GHz to 12.75GHz
(outside FCC restricted bands)		 +14dBm setting < –40 dBm
Spurious emissions out-of-band, 920.6/928MHz(2) Below 710MHz
(ARIB T-108)		 +14dBm setting < –36 dBm
710MHz to 900MHz
(ARIB T-108)		 +14dBm setting < –55 dBm
900MHz to 915MHz
(ARIB T-108)		 +14dBm setting < –55 dBm
930MHz to 1000MHz
(ARIB T-108)		 +14dBm setting < –55 dBm
1000MHz to 1215MHz
(ARIB T-108)		 +14dBm setting < –45 dBm
Above 1215 MHz
(ARIB T-108)		 +14dBm setting < –30 dBm
Harmonics Second harmonic +14dBm setting, 868MHz < –30 dBm
+14dBm setting, 915MHz < –30
Third harmonic +14dBm setting, 868MHz < –30 dBm
+14dBm setting, 915MHz < –42
Fourth harmonic +14dBm setting, 868MHz < –30 dBm
+14dBm setting, 915MHz < –42
Fifth harmonic +14dBm setting, 868MHz < –30 dBm
+14dBm setting, 915MHz < –42
(1) Some combinations of frequency, data rate and modulation format requires use of external crystal load capacitors for regulatory compliance. More details can be found in the device errata.
(2) Suitable for systems targeting compliance with EN 300 220, EN 303 131, EN 303 204, FCC CFR47 Part 15, ARIB STD-T108.