JAJSEL0I January   2018  – February 2021 CC1352R

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Functional Block Diagram
  5. 5 Revision History
  6. 6 Device Comparison
  7. 7 Terminal Configuration and Functions
    1. 7.1 Pin Diagram – RGZ Package (Top View)
    2. 7.2 Signal Descriptions – RGZ Package
    3. 7.3 Connections for Unused Pins and Modules
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Power Supply and Modules
    5. 8.5  Power Consumption - Power Modes
    6. 8.6  Power Consumption - Radio Modes
    7. 8.7  Nonvolatile (Flash) Memory Characteristics
    8. 8.8  Thermal Resistance Characteristics
    9. 8.9  RF Frequency Bands
    10. 8.10 861 MHz to 1054 MHz - Receive (RX)
    11. 8.11 861 MHz to 1054 MHz - Transmit (TX) 
    12. 8.12 861 MHz to 1054 MHz - PLL Phase Noise Wideband Mode
    13. 8.13 861 MHz to 1054 MHz - PLL Phase Noise Narrowband Mode
    14. 8.14 359 MHz to 527 MHz - Receive (RX)
    15. 8.15 359 MHz to 527 MHz - Transmit (TX) 
    16. 8.16 359 MHz to 527 MHz - PLL Phase Noise
    17. 8.17 143 MHz to 176 MHz - Receive (RX)
    18. 8.18 143 MHz to 176 MHz  - Transmit (TX) 
    19. 8.19 143 MHz to 176 MHz - PLL Phase Noise
    20. 8.20 Bluetooth Low Energy - Receive (RX)
    21. 8.21 Bluetooth Low Energy - Transmit (TX)
    22. 8.22 Zigbee and Thread - IEEE 802.15.4-2006 2.4 GHz (OQPSK DSSS1:8, 250 kbps) - RX
    23. 8.23 Zigbee and Thread - IEEE 802.15.4-2006 2.4 GHz (OQPSK DSSS1:8, 250 kbps) - TX
    24. 8.24 Timing and Switching Characteristics
      1. 8.24.1 Reset Timing
      2. 8.24.2 Wakeup Timing
      3. 8.24.3 Clock Specifications
        1. 8.24.3.1 48 MHz Clock Input (TCXO)
        2. 8.24.3.2 48 MHz Crystal Oscillator (XOSC_HF)
        3. 8.24.3.3 48 MHz RC Oscillator (RCOSC_HF)
        4. 8.24.3.4 2 MHz RC Oscillator (RCOSC_MF)
        5. 8.24.3.5 32.768 kHz Crystal Oscillator (XOSC_LF)
        6. 8.24.3.6 32 kHz RC Oscillator (RCOSC_LF)
      4. 8.24.4 Synchronous Serial Interface (SSI) Characteristics
        1. 8.24.4.1 Synchronous Serial Interface (SSI) Characteristics
        2.       47
      5. 8.24.5 UART
        1. 8.24.5.1 UART Characteristics
    25. 8.25 Peripheral Characteristics
      1. 8.25.1 ADC
        1. 8.25.1.1 Analog-to-Digital Converter (ADC) Characteristics
      2. 8.25.2 DAC
        1. 8.25.2.1 Digital-to-Analog Converter (DAC) Characteristics
      3. 8.25.3 Temperature and Battery Monitor
        1. 8.25.3.1 Temperature Sensor
        2. 8.25.3.2 Battery Monitor
      4. 8.25.4 Comparators
        1. 8.25.4.1 Low-Power Clocked Comparator
        2. 8.25.4.2 Continuous Time Comparator
      5. 8.25.5 Current Source
        1. 8.25.5.1 Programmable Current Source
      6. 8.25.6 GPIO
        1. 8.25.6.1 GPIO DC Characteristics
    26. 8.26 Typical Characteristics
      1. 8.26.1 MCU Current
      2. 8.26.2 RX Current
      3. 8.26.3 TX Current
      4. 8.26.4 RX Performance
      5. 8.26.5 TX Performance
      6. 8.26.6 ADC Performance
  9. 9 Detailed Description
    1. 9.1  Overview
    2. 9.2  System CPU
    3. 9.3  Radio (RF Core)
      1. 9.3.1 Proprietary Radio Formats
      2. 9.3.2 Bluetooth 5.2 Low Energy
      3. 9.3.3 802.15.4 (Thread, Zigbee, 6LoWPAN)
    4. 9.4  Memory
    5. 9.5  Sensor Controller
    6. 9.6  Cryptography
    7. 9.7  Timers
    8. 9.8  Serial Peripherals and I/O
    9. 9.9  Battery and Temperature Monitor
    10. 9.10 µDMA
    11. 9.11 Debug
    12. 9.12 Power Management
    13. 9.13 Clock Systems
    14. 9.14 Network Processor
  10. 10Application, Implementation, and Layout
    1. 10.1 Reference Designs
    2. 10.2 Junction Temperature Calculation
  11. 11Device and Documentation Support
    1. 11.1 Tools and Software
      1. 11.1.1 SimpleLink™ Microcontroller Platform
    2. 11.2 Documentation Support
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Packaging Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • RGZ|48
サーマルパッド・メカニカル・データ
発注情報

7.2 Signal Descriptions – RGZ Package

Table 7-1 Signal Descriptions – RGZ Package
PIN I/O TYPE DESCRIPTION
NAME NO.
DCDC_SW 33 — Power Output from internal DC/DC converter(1)
DCOUPL 23 — Power For decoupling of internal 1.27 V regulated digital-supply (2)
DIO_3 8 I/O Digital GPIO
DIO_4 9 I/O Digital GPIO
DIO_5 10 I/O Digital GPIO, high-drive capability
DIO_6 11 I/O Digital GPIO, high-drive capability
DIO_7 12 I/O Digital GPIO, high-drive capability
DIO_8 14 I/O Digital GPIO
DIO_9 15 I/O Digital GPIO
DIO_10 16 I/O Digital GPIO
DIO_11 17 I/O Digital GPIO
DIO_12 18 I/O Digital GPIO
DIO_13 19 I/O Digital GPIO
DIO_14 20 I/O Digital GPIO
DIO_15 21 I/O Digital GPIO
DIO_16 26 I/O Digital GPIO, JTAG_TDO, high-drive capability
DIO_17 27 I/O Digital GPIO, JTAG_TDI, high-drive capability
DIO_18 28 I/O Digital GPIO
DIO_19 29 I/O Digital GPIO
DIO_20 30 I/O Digital GPIO
DIO_21 31 I/O Digital GPIO
DIO_22 32 I/O Digital GPIO
DIO_23 36 I/O Digital or Analog GPIO, analog capability
DIO_24 37 I/O Digital or Analog GPIO, analog capability
DIO_25 38 I/O Digital or Analog GPIO, analog capability
DIO_26 39 I/O Digital or Analog GPIO, analog capability
DIO_27 40 I/O Digital or Analog GPIO, analog capability
DIO_28 41 I/O Digital or Analog GPIO, analog capability
DIO_29 42 I/O Digital or Analog GPIO, analog capability
DIO_30 43 I/O Digital or Analog GPIO, analog capability
EGP — — GND Ground – exposed ground pad(3)
JTAG_TMSC 24 I/O Digital JTAG TMSC, high-drive capability
JTAG_TCKC 25 I Digital JTAG TCKC
RESET_N 35 I Digital Reset, active low. No internal pullup resistor
RF_P_2_4GHZ 1 — RF Positive 2.4-GHz RF input signal to LNA during RX
Positive 2.4-GHz RF output signal from PA during TX
RF_N_2_4GHZ 2 — RF Negative 2.4-GHz RF input signal to LNA during RX
Negative 2.4-GHz RF output signal from PA during TX
RF_P_SUB_1GHZ 3 — RF Positive Sub-1 GHz RF input signal to LNA during RX
Positive Sub-1 GHz RF output signal from PA during TX
RF_N_SUB_1GHZ 4 — RF Negative Sub-1 GHz RF input signal to LNA during RX
Negative Sub-1 GHz RF output signal from PA during TX
RX_TX 5 — RF Optional bias pin for the RF LNA
VDDR 45 — Power Internal supply, must be powered from the internal DC/DC converter or the internal LDO(2)(4)(6)
VDDR_RF 48 — Power Internal supply, must be powered from the internal DC/DC converter or the internal LDO(2)(5)(6)
VDDS 44 — Power 1.8-V to 3.8-V main chip supply(1)
VDDS2 13 — Power 1.8-V to 3.8-V DIO supply(1)
VDDS3 22 — Power 1.8-V to 3.8-V DIO supply(1)
VDDS_DCDC 34 — Power 1.8-V to 3.8-V DC/DC converter supply
X48M_N 46 — Analog 48-MHz crystal oscillator pin 1
X48M_P 47 — Analog 48-MHz crystal oscillator pin 2
X32K_Q1 6 — Analog 32-kHz crystal oscillator pin 1
X32K_Q2 7 — Analog 32-kHz crystal oscillator pin 2
(1) For more details, see technical reference manual listed in Section 11.2.
(2) Do not supply external circuitry from this pin.
(3) EGP is the only ground connection for the device. Good electrical connection to device ground on printed circuit board (PCB) is imperative for proper device operation.
(4) If internal DC/DC converter is not used, this pin is supplied internally from the main LDO.
(5) If internal DC/DC converter is not used, this pin must be connected to VDDR for supply from the main LDO.
(6) Output from internal DC/DC and LDO is trimmed to 1.68 V.