JAJSQQ5A december 2022 – june 2023 CC1354R10
ADVANCE INFORMATION
PARAMETERS | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
tCS.LEAD | CS lead-time, CS active to clock | 1 | SCLK | |||
tCS.LAG | CS lag time, Last clock to CS inactive | 1 | SCLK | |||
tCS.ACC | CS access time, CS active to MISO data out | VDDS = 3.3V | 56 | ns | ||
tCS.ACC | CS access time, CS active to MISO data out | VDDS = 1.8V | 70 | ns | ||
tCS.DIS | CS disable time, CS inactive to MISO high inpedance | VDDS = 3.3V | 56 | ns | ||
tCS.DIS | CS disable time, CS inactive to MISO high inpedance | VDDS = 1.8V | 70 | ns | ||
tSU.SI | MOSI input data setup time | 30 | ns | |||
tHD.SI | MOSI input data hold time | 0 | ns | |||
tVALID.SO | MISO output data valid time(1) | SCLK edge to MISO valid,CL = 20 pF, 3.3V (4) | 50 | ns | ||
tVALID.SO | MISO output data valid time(1) | SCLK edge to MISO valid,CL = 20 pF, 1.8V (4) | 65 | ns | ||
tHD.SO | MISO output data hold time(2) | CL = 20 pF | 0 | ns |