SWRS096D December 2012 – April 2015 CC2538
PRODUCTION DATA.
MIN | MAX | UNIT | ||
---|---|---|---|---|
Supply voltage | All supply pins must have the same voltage | –0.3 | 3.9 | V |
Voltage on any digital pin | –0.3 | VDD + 0.3, ≤ 3.9 | V | |
Input RF level | 10 | dBm | ||
Tstg | Storage temperature range | –40 | 125 | °C |
VALUE | UNIT | ||||
---|---|---|---|---|---|
VESD | Electrostatic discharge (ESD) performance: | Human body model (HBM), per ANSI/ESDA/JEDEC JS001(1) | ±1 | kV | |
Charged device model (CDM), per JESD22-C101(2) |
All pins | ±500 | V |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Operating ambient temperature range, TA | –40 | 125 | °C | |
Operating supply voltage (1) | 2 | 3.6 | V |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
---|---|---|---|---|---|
Wake-Up and Timing | |||||
Power mode 1 → active | Digital regulator on, 16-MHz RCOSC and 32-MHz crystal oscillator off. Start-up of 16-MHz RCOSC | 4 | µs | ||
Power mode 2 or 3 → active | Digital regulator off, 16-MHz RCOSC and 32-MHz crystal oscillator off. Start-up of regulator and 16-MHz RCOSC | 136 | µs | ||
Active → TX or RX | Initially running on 16-MHz RCOSC, with 32-MHz XOSC off | 0.5 | ms | ||
With 32-MHz XOSC initially on | 192 | µs | |||
RX/TX and TX/RX turnaround | 192 | µs | |||
USB PLL start-up time | With 32-MHz XOSC initially on | 32 | µs | ||
Radio Part | |||||
RF frequency range | Programmable in 1-MHz steps, 5 MHz between channels for compliance with (1) | 2394 | 2507 | MHz | |
Radio baud rate | As defined by (1) | 250 | kbps | ||
Radio chip rate | As defined by (1) | 2 | MChip/s | ||
Flash Memory | |||||
Flash erase cycles | 20 | k Cycles | |||
Flash page size | 2 | KB |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
---|---|---|---|---|---|
Receiver sensitivity | PER = 1%, as specified by (1), normal operating conditions (25 °C, 3 V, 2440 MHz) (1) requires –85 dBm |
–97 | –92 | dBm | |
PER = 1%, as specified by (1), entire operating conditions (1) requires –85 dBm |
–88 | dBm | |||
Saturation (maximum input level) | PER = 1%, as specified by (1)
(1) requires –20 dBm |
10 | dBm | ||
Adjacent-channel rejection, 5-MHz channel spacing |
Wanted signal –82 dBm, adjacent modulated channel at 5 MHz, PER = 1%, as specified by (1). (1) requires 0 dB |
44 | dB | ||
Adjacent-channel rejection, –5-MHz channel spacing |
Wanted signal –82 dBm, adjacent modulated channel at –5 MHz, PER = 1%, as specified by (1). (1) requires 0 dB |
44 | dB | ||
Alternate-channel rejection, 10-MHz channel spacing |
Wanted signal –82 dBm, adjacent modulated channel at 10 MHz, PER = 1%, as specified by (1)
(1) requires 30 dB |
52 | dB | ||
Alternate-channel rejection, –10-MHz channel spacing |
Wanted signal –82 dBm, adjacent modulated channel at –10 MHz, PER = 1%, as specified by (1)
(1) requires 30 dB |
52 | dB | ||
Channel rejection | Wanted signal at –82 dBm. Undesired signal is an IEEE 802.15.4 modulated channel, stepped through all channels from 2405 to 2480 MHz. Signal level for PER = 1%. | dB | |||
≥ 20 MHzXXXXX
≤ –20 MHzXXXXX |
51 51 |
||||
Blocking/desensitization | dBm | ||||
5 MHz from band edgeXXXXX
10 MHz from band edgeXXXXX 20 MHz from band edgeXXXXX 50 MHz from band edgeXXXXX –5 MHz from band edgeXXXXX –10 MHz from band edgeXXXXX –20 MHz from band edgeXXXXX –50 MHz from band edgeXXXXX |
Wanted signal 3 dB above the sensitivity level, CW jammer, PER = 1%. Measured according to EN 300 440 class 2. |
–35 –34 –37 –32 –37 –38 –35 –34 |
|||
Spurious emission. Only largest spurious emission stated within each band. | Conducted measurement with a 50-Ω single-ended load. Suitable for systems targeting compliance with EN 300 328, EN 300 440, FCC CFR47 Part 15, and ARIB STD-T-66. | dBm | |||
30 MHz–1000 MHzXXXXX
1 GHz–12.75 GHzXXXXX |
–80 –80 |
||||
Frequency error tolerance(2) | (1) requires minimum 80 ppm | ±150 | ppm | ||
Symbol rate error tolerance(3) | (1) requires minimum 80 ppm | ±1000 | ppm |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
---|---|---|---|---|---|
Nominal output power | Delivered to a single-ended 50-Ω load through a balun using maximum-recommended output-power setting (1) requires minimum –3 dBm |
7 | dBm | ||
Programmable output-power range | 30 | dB | |||
Spurious emissions | Maximum recommended output power setting(2)
Measured according to stated regulations. |
||||
Only largest spurious emission stated within each band. | 25–1000 MHz (outside restricted bands) 25–1000 MHz (within FCC restricted bands) 25–1000 MHz (within ETSI restricted bands) 1800–1900 MHz (ETSI restricted band) 5150–5300 MHz (ETSI restricted band) 1–12.75 GHz (except restricted bands) At 2483.5 MHz and above (FCC restricted band), fc= 2480 MHz(3) |
–56 –58 –58 –60 –54 –51 –42 |
dBm | ||
Error vector magnitude (EVM) | Measured as defined by (1) using maximum-recommended output-power setting (1) requires maximum 35%. |
3% | |||
Optimum load impedance | Differential impedance on the RF pins | 66 + j64 | Ω |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
Crystal frequency | 32 | MHz | ||||
Crystal frequency accuracy requirement(1) | –40 | 40 | ppm | |||
ESR | Equivalent series resistance | 6 | 16 | 60 | Ω | |
C0 | Crystal shunt capacitance | 1 | 1.9 | 7 | pF | |
CL | Crystal load capacitance | 10 | 13 | 16 | pF | |
Start-up time | 0.3 | ms | ||||
Power-down guard time | The crystal oscillator must be in power down for a guard time before using it again. This requirement is valid for all modes of operation. The need for power-down guard time can vary with crystal type and load. | 3 | ms |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
Crystal frequency | 32.768 | kHz | ||||
Crystal frequency accuracy requirement(1) | –40 | 40 | ppm | |||
ESR | Equivalent series resistance | 40 | 130 | Ω | ||
C0 | Crystal shunt capacitance | 0.9 | 2 | pF | ||
CL | Crystal load capacitance | 12 | 16 | pF | ||
Start-up time | 0.4 | s |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
---|---|---|---|---|---|
Calibrated frequency(1) | 32.753 | kHz | |||
Frequency accuracy after calibration | ±0.2% | ||||
Temperature coefficient(2) | 0.4 | %/ °C | |||
Supply-voltage coefficient(3) | 3 | %/V | |||
Calibration time(4) | 2 | ms |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
---|---|---|---|---|---|
Frequency(1) | 16 | MHz | |||
Uncalibrated frequency accuracy | ±18% | ||||
Calibrated frequency accuracy | ±0.6% | ±1% | |||
Start-up time | 10 | µs | |||
Initial calibration time(2) | 50 | µs |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
RSSI range | 100 | dB | |||||
Absolute uncalibrated RSSI/CCA accuracy | ±4 | dB | |||||
RSSI/CCA offset(1) | 73 | dB | |||||
Step size (LSB value) | 1 | dB |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
FREQEST range | ±250 | kHz | |||||
FREQEST accuracy | ±10 | kHz | |||||
FREQEST offset(1) | 15 | kHz | |||||
Step size (LSB value) | 7.8 | kHz |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
---|---|---|---|---|---|
Phase noise, unmodulated carrier | At ±1-MHz offset from carrier | –111 | dBc/Hz | ||
At ±2-MHz offset from carrier | –119 | ||||
At ±5-MHz offset from carrier | –126 |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
Input voltage | VDD is voltage on AVDD5 pin | 0 | VDD | V | ||
External reference voltage | VDD is voltage on AVDD5 pin | 0 | VDD | V | ||
External reference voltage differential | VDD is voltage on AVDD5 pin | 0 | VDD | V | ||
Input resistance, signal | Using 4-MHz clock speed | 197 | kΩ | |||
Full-scale signal(1) | Peak-to-peak, defines 0 dBFS | 2.97 | V | |||
ENOB(1) | Effective number of bits | Single-ended input, 7-bit setting | 5.7 | Bits | ||
Single-ended input, 9-bit setting | 7.5 | |||||
Single-ended input, 10-bit setting | 9.3 | |||||
Single-ended input, 12-bit setting | 10.8 | |||||
Differential input, 7-bit setting | 6.5 | |||||
Differential input, 9-bit setting | 8.3 | |||||
Differential input, 10-bit setting | 10.0 | |||||
Differential input, 12-bit setting | 11.5 | |||||
Useful power bandwidth | 7-bit setting, both single and differential | 0–20 | kHz | |||
THD(1) | Total harmonic distortion | Single-ended input, 12-bit setting, –6 dBFS | –75.2 | dB | ||
Differential input, 12-bit setting, –6 dBFS | –86.6 | |||||
Signal to nonharmonic ratio(1) | Single-ended input, 12-bit setting | 70.2 | dB | |||
Differential input, 12-bit setting | 79.3 | |||||
Single-ended input, 12-bit setting, –6 dBFS | 78.8 | |||||
Differential input, 12-bit setting, –6 dBFS | 88.9 | |||||
CMRR | Common-mode rejection ratio | Differential input, 12-bit setting, 1-kHz sine (0 dBFS), limited by ADC resolution | >84 | dB | ||
Crosstalk | Single-ended input, 12-bit setting, 1-kHz sine (0 dBFS), limited by ADC resolution | < –84 | dB | |||
Offset | Midscale | –3 | mV | |||
Gain error | 0.68% | |||||
DNL(1) | Differential nonlinearity | 12-bit setting, mean | 0.05 | LSB | ||
12-bit setting, maximum | 0.9 | |||||
INL(1) | Integral nonlinearity | 12-bit setting, mean | 4.6 | LSB | ||
12-bit setting, maximum | 13.3 | |||||
SINAD(1)
(–THD+N) |
Signal-to-noise-and-distortion | Single-ended input, 7-bit setting | 35.4 | dB | ||
Single-ended input, 9-bit setting | 46.8 | |||||
Single-ended input, 10-bit setting | 57.5 | |||||
Single-ended input, 12-bit setting | 66.6 | |||||
Differential input, 7-bit setting | 40.7 | |||||
Differential input, 9-bit setting | 51.6 | |||||
Differential input, 10-bit setting | 61.8 | |||||
Differential input, 12-bit setting | 70.8 | |||||
Conversion time | 7-bit setting | 20 | µs | |||
9-bit setting | 36 | |||||
10-bit setting | 68 | |||||
12-bit setting | 132 | |||||
Current consumption | 1.2 | mA | ||||
Internal reference voltage | 1.19 | V | ||||
Internal reference VDD coefficient | 2 | mV/V | ||||
Internal reference temperature coefficient | 0.4 | mV/10 °C |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
---|---|---|---|---|---|
System clock, fSYSCLK
tSYSCLK = 1/fSYSCLK |
The undivided system clock is 32 MHz when crystal oscillator is used. The undivided system clock is 16 MHz when calibrated 16-MHz RC oscillator is used. | 16 | 32 | MHz | |
RESET_N low duration(1) | See item 1, Figure 5-1. This is the shortest pulse that is recognized as a complete reset pin request. | 1 | µs | ||
Interrupt pulse duration | See item 2, Figure 5-1.This is the shortest pulse that is recognized as an interrupt request. | 20 | ns |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
---|---|---|---|---|---|
Logic-0 input voltage | 0.5 | V | |||
Logic-1 input voltage | 2.5 | V | |||
Logic-0 input current | Input equals 0 V | –300 | 300 | nA | |
Logic-1 input current | Input equals VDD | –300 | 300 | nA | |
I/O-pin pullup and pulldown resistors | 20 | kΩ | |||
Logic-0 output voltage, 4-mA pins | Output load 4 mA | 0.5 | V | ||
Logic-1 output voltage, 4-mA pins | Output load 4 mA | 2.4 | V | ||
Logic-0 output voltage, 20-mA pins | Output load 20 mA | 0.5 | V | ||
Logic-1 output voltage, 20-mA pins | Output load 20 mA | 2.4 | V |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
USB pad voltage output, high | VDD 3.6 V, 4-mA load | 3.4 | V | |||
USB pad voltage output, low | VDD 3.6 V, 4-mA load | 0.2 | V |
NAME | DESCRIPTION | °C/W(1)(2) | AIR FLOW (m/s)(3) |
---|---|---|---|
RθJC-top | Junction-to-case (top) | 8.9 | 0.00 |
RθJB | Junction-to-board | 3.1 | 0.00 |
RθJA | Junction-to-free air | 25.0 | 0.00 |
PsiJT | Junction-to-package top | 3.1 | 0.00 |
PsiJB-bottom | Junction-to-board (bottom) | 0.4 | 0.00 |