JAJSCW4C december 2016 – september 2020 CC2640R2F
PRODUCTION DATA
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
To minimize power consumption, the CC2640R2F device supports a number of power modes and power management features (see Table 9-2).
MODE | SOFTWARE CONFIGURABLE POWER MODES | RESET PIN HELD | |||
---|---|---|---|---|---|
ACTIVE | IDLE | STANDBY | SHUTDOWN | ||
CPU | Active | Off | Off | Off | Off |
Flash | On | Available | Off | Off | Off |
SRAM | On | On | On | Off | Off |
Radio | Available | Available | Off | Off | Off |
Supply System | On | On | Duty Cycled | Off | Off |
Current | 1.45 mA + 31 µA/MHz | 650 µA | 1 µA | 0.15 µA | 0.1 µA |
Wake-up Time to CPU Active(1) | – | 14 µs | 151 µs | 1015 µs | 1015 µs |
Register Retention | Full | Full | Partial | No | No |
SRAM Retention | Full | Full | Full | No | No |
High-Speed Clock | XOSC_HF
or RCOSC_HF |
XOSC_HF or
RCOSC_HF |
Off | Off | Off |
Low-Speed Clock | XOSC_LF or
RCOSC_LF |
XOSC_LF or
RCOSC_LF |
XOSC_LF or RCOSC_LF | Off | Off |
Peripherals | Available | Available | Off | Off | Off |
Sensor Controller | Available | Available | Available | Off | Off |
Wake up on RTC | Available | Available | Available | Off | Off |
Wake up on Pin Edge | Available | Available | Available | Available | Off |
Wake up on Reset Pin | Available | Available | Available | Available | Available |
Brown Out Detector (BOD) | Active | Active | Duty Cycled | Off | N/A |
Power On Reset (POR) | Active | Active | Active | Active | N/A |
In active mode, the application CM3 CPU is actively executing code. Active mode provides normal operation of the processor and all of the peripherals that are currently enabled. The system clock can be any available clock source (see Table 9-2).
In idle mode, all active peripherals can be clocked, but the Application CPU core and memory are not clocked and no code is executed. Any interrupt event will bring the processor back into active mode.
In standby mode, only the always-on domain (AON) is active. An external wake-up event, RTC event, or sensor-controller event is required to bring the device back to active mode. MCU peripherals with retention do not need to be reconfigured when waking up again, and the CPU continues execution from where it went into standby mode. All GPIOs are latched in standby mode.
In shutdown mode, the device is turned off entirely, including the AON domain and the Sensor Controller. The I/Os are latched with the value they had before entering shutdown mode. A change of state on any I/O pin defined as a wake-up from Shutdown pin wakes up the device and functions as a reset trigger. The CPU can differentiate between a reset in this way, a reset-by-reset pin, or a power-on-reset by reading the reset status register. The only state retained in this mode is the latched I/O state and the Flash memory contents.
The Sensor Controller is an autonomous processor that can control the peripherals in the Sensor Controller independently of the main CPU, which means that the main CPU does not have to wake up, for example, to execute an ADC sample or poll a digital sensor over SPI. The main CPU saves both current and wake-up time that would otherwise be wasted. The Sensor Controller Studio enables the user to configure the sensor controller and choose which peripherals are controlled and which conditions wake up the main CPU.