JAJSCW4 データシート

JAJSCW4C december 2016 – september 2020 CC2640R2F

PRODUCTION DATA

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）

RSM|32
RGZ|48
RHB|32
YFV|34

サーマルパッド・メカニカル・データ

RGZ|48
- QFND031W
RSM|32
- QFND112H
RHB|32
- QFND029X

発注情報

8.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾⁽²⁾

		MIN	MAX	UNIT
Supply voltage (VDDS, VDDS2, and VDDS3)	VDDR supplied by internal DC/DC regulator or internal GLDO. VDDS_DCDC connected to VDDS on PCB	–0.3	4.1	V
Supply voltage (VDDS⁽³⁾ and VDDR)	External regulator mode (VDDS and VDDR pins connected on PCB)	–0.3	2.25	V
Voltage on any digital pin⁽⁴⁾⁽⁵⁾		–0.3	VDDSx + 0.3, max 4.1	V
Voltage on crystal oscillator pins, X32K_Q1, X32K_Q2, X24M_N and X24M_P		–0.3	VDDR + 0.3, max 2.25	V
Voltage on ADC input (V_in)	Voltage scaling enabled	–0.3	VDDS	V
	Voltage scaling disabled, internal reference	–0.3	1.49
	Voltage scaling disabled, VDDS as reference	–0.3	VDDS / 2.9
Input RF level			5	dBm
T_stg	Storage temperature	–40	150	°C

(1) All voltage values are with respect to ground, unless otherwise noted.

(2) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(3) In external regulator mode, VDDS2 and VDDS3 must be at the same potential as VDDS.

(4) Including analog-capable DIO.

(5) Each pin is referenced to a specific VDDSx (VDDS, VDDS2 or VDDS3). For a pin-to-VDDS mapping table, see Table 9-3.