JAJSCF8D August 2016 – July 2019 CC2650MODA
PRODUCTION DATA.
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PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
Icore | Core current consumption | Reset. RESET_N pin asserted or VDD below Power-on-Reset threshold | 100 | nA | ||
Shutdown. No clocks running, no retention | 150 | |||||
Standby. With RTC, CPU, RAM and (partial) register retention. RCOSC_LF | 1 | µA | ||||
Standby. With RTC, CPU, RAM and (partial) register retention. XOSC_LF | 1.2 | |||||
Standby. With Cache, RTC, CPU, RAM and (partial) register retention. RCOSC_LF | 2.5 | |||||
Standby. With Cache, RTC, CPU, RAM and (partial) register retention. XOSC_LF | 2.7 | |||||
Idle. Supply systems and RAM powered. | 550 | |||||
Active. Core running CoreMark | 1.45 mA +
31 µA/MHz |
|||||
Radio RX | 6.2 | mA | ||||
Radio TX, 0-dBm output power | 6.8 | |||||
Radio TX, 5-dBm output power | 9.4 | |||||
Peripheral Current Consumption (Adds to core current Icore for each peripheral unit activated)(1) | ||||||
Iperi | Peripheral power domain | Delta current with domain enabled | 20 | µA | ||
Serial power domain | Delta current with domain enabled | 13 | ||||
RF core | Delta current with power domain enabled, clock enabled, RF Core Idle | 237 | ||||
µDMA | Delta current with clock enabled, module idle | 130 | ||||
Timers | Delta current with clock enabled, module idle | 113 | ||||
I2C | Delta current with clock enabled, module idle | 12 | ||||
I2S | Delta current with clock enabled, module idle | 36 | ||||
SSI | Delta current with clock enabled, module idle | 93 | ||||
UART | Delta current with clock enabled, module idle | 164 |