JAJSCF8D August   2016  – July 2019 CC2650MODA

PRODUCTION DATA.  

  1. 1 デバイスの概要
    1. 1.1 特長
    2. 1.2 アプリケーション
    3. 1.3 概要
    4. 1.4 機能ブロック図
  2. 2 改訂履歴
  3. 3 Device Comparison
    1. 3.1 Related Products
  4. 4 Terminal Configuration and Functions
    1. 4.1 Module Pin Diagram
    2. 4.2 Pin Functions
  5. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Power Consumption Summary
    5. 5.5  General Characteristics
    6. 5.6  Antenna
    7. 5.7  1-Mbps GFSK (Bluetooth low energy) – RX
    8. 5.8  1-Mbps GFSK (Bluetooth low energy) – TX
    9. 5.9  IEEE 802.15.4 (Offset Q-PSK DSSS, 250 kbps) – RX
    10. 5.10 IEEE 802.15.4 (Offset Q-PSK DSSS, 250 kbps) – TX
    11. 5.11 24-MHz Crystal Oscillator (XOSC_HF)
    12. 5.12 32.768-kHz Crystal Oscillator (XOSC_LF)
    13. 5.13 48-MHz RC Oscillator (RCOSC_HF)
    14. 5.14 32-kHz RC Oscillator (RCOSC_LF)
    15. 5.15 ADC Characteristics
    16. 5.16 Temperature Sensor
    17. 5.17 Battery Monitor
    18. 5.18 Continuous Time Comparator
    19. 5.19 Low-Power Clocked Comparator
    20. 5.20 Programmable Current Source
    21. 5.21 DC Characteristics
    22. 5.22 Thermal Resistance Characteristics for MOH Package
    23. 5.23 Timing Requirements
    24. 5.24 Switching Characteristics
    25. 5.25 Typical Characteristics
  6. 6 Detailed Description
    1. 6.1  Overview
    2. 6.2  Functional Block Diagram
    3. 6.3  Main CPU
    4. 6.4  RF Core
    5. 6.5  Sensor Controller
    6. 6.6  Memory
    7. 6.7  Debug
    8. 6.8  Power Management
    9. 6.9  Clock Systems
    10. 6.10 General Peripherals and Modules
    11. 6.11 System Architecture
    12. 6.12 Certification
      1. 6.12.1 Regulatory Information Europe
      2. 6.12.2 Federal Communications Commission Statement
      3. 6.12.3 Canada, Industry Canada (IC)
      4. 6.12.4 Japan (JATE ID)
    13. 6.13 End Product Labeling
    14. 6.14 Manual Information to the End User
    15. 6.15 Module Marking
  7. 7 Application, Implementation, and Layout
    1. 7.1 Application Information
      1. 7.1.1 Typical Application Circuit
    2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
  8. 8 Environmental Requirements and Specifications
    1. 8.1 PCB Bending
    2. 8.2 Handling Environment
      1. 8.2.1 Terminals
      2. 8.2.2 Falling
    3. 8.3 Storage Condition
      1. 8.3.1 Moisture Barrier Bag Before Opened
      2. 8.3.2 Moisture Barrier Bag Open
    4. 8.4 Baking Conditions
    5. 8.5 Soldering and Reflow Condition
  9. 9 デバイスおよびドキュメントのサポート
    1. 9.1  デバイスの項目表記
    2. 9.2  ツールとソフトウェア
    3. 9.3  ドキュメントのサポート
    4. 9.4  テキサス・インスツルメンツのローパワーRF Webサイト
    5. 9.5  ローパワーRF eニュースレター
    6. 9.6  コミュニティ・リソース
    7. 9.7  追加情報
    8. 9.8  商標
    9. 9.9  静電気放電に関する注意事項
    10. 9.10 Export Control Notice
    11. 9.11 Glossary
  10. 10メカニカル、パッケージ、および注文情報
    1. 10.1 パッケージ情報
    2. 10.2 PACKAGE OPTION ADDENDUM
      1. 10.2.1 PACKAGING INFORMATION
    3. 10.3 PACKAGE MATERIALS INFORMATION
      1. 10.3.1 TAPE AND REEL INFORMATION

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • MOH|29
サーマルパッド・メカニカル・データ
発注情報

5.24 Switching Characteristics

Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDD = 3.0 V, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
WAKEUP AND TIMING
Idle → Active 14 µs
Standby → Active 151 µs
Shutdown → Active 1015 µs
SYNCHRONOUS SERIAL INTERFACE (SSI) (1)
S1 (TX only)(2) tclk_per (SSIClk period) One-way communication to SLAVE 4 65024 System clocks
S1 (TX and RX)(2) tclk_per (SSIClk period) Normal duplex operation 8 65024 System clocks
S2(2) tclk_high (SSIClk high time) 0.5 tclk_per
S3(2) tclk_low (SSIClk low time) 0.5 tclk_per
(1) Device operating as master. For SSI slave operation, see Section 5.23.
(2) Refer to SSI timing diagrams Figure 5-1, Figure 5-2, and Figure 5-3.
CC2650MODA td_1_swrs158.gifFigure 5-1 SSI Timing for TI Frame Format (FRF = 01), Single Transfer Timing Measurement
CC2650MODA td_2_swrs158.gifFigure 5-2 SSI Timing for MICROWIRE Frame Format (FRF = 10), Single Transfer
CC2650MODA td_3_swrs158.gifFigure 5-3 SSI Timing for SPI Frame Format (FRF = 00), With SPH = 1