JAJSCF8D August   2016  – July 2019 CC2650MODA

PRODUCTION DATA.  

  1. 1 デバイスの概要
    1. 1.1 特長
    2. 1.2 アプリケーション
    3. 1.3 概要
    4. 1.4 機能ブロック図
  2. 2 改訂履歴
  3. 3 Device Comparison
    1. 3.1 Related Products
  4. 4 Terminal Configuration and Functions
    1. 4.1 Module Pin Diagram
    2. 4.2 Pin Functions
  5. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Power Consumption Summary
    5. 5.5  General Characteristics
    6. 5.6  Antenna
    7. 5.7  1-Mbps GFSK (Bluetooth low energy) – RX
    8. 5.8  1-Mbps GFSK (Bluetooth low energy) – TX
    9. 5.9  IEEE 802.15.4 (Offset Q-PSK DSSS, 250 kbps) – RX
    10. 5.10 IEEE 802.15.4 (Offset Q-PSK DSSS, 250 kbps) – TX
    11. 5.11 24-MHz Crystal Oscillator (XOSC_HF)
    12. 5.12 32.768-kHz Crystal Oscillator (XOSC_LF)
    13. 5.13 48-MHz RC Oscillator (RCOSC_HF)
    14. 5.14 32-kHz RC Oscillator (RCOSC_LF)
    15. 5.15 ADC Characteristics
    16. 5.16 Temperature Sensor
    17. 5.17 Battery Monitor
    18. 5.18 Continuous Time Comparator
    19. 5.19 Low-Power Clocked Comparator
    20. 5.20 Programmable Current Source
    21. 5.21 DC Characteristics
    22. 5.22 Thermal Resistance Characteristics for MOH Package
    23. 5.23 Timing Requirements
    24. 5.24 Switching Characteristics
    25. 5.25 Typical Characteristics
  6. 6 Detailed Description
    1. 6.1  Overview
    2. 6.2  Functional Block Diagram
    3. 6.3  Main CPU
    4. 6.4  RF Core
    5. 6.5  Sensor Controller
    6. 6.6  Memory
    7. 6.7  Debug
    8. 6.8  Power Management
    9. 6.9  Clock Systems
    10. 6.10 General Peripherals and Modules
    11. 6.11 System Architecture
    12. 6.12 Certification
      1. 6.12.1 Regulatory Information Europe
      2. 6.12.2 Federal Communications Commission Statement
      3. 6.12.3 Canada, Industry Canada (IC)
      4. 6.12.4 Japan (JATE ID)
    13. 6.13 End Product Labeling
    14. 6.14 Manual Information to the End User
    15. 6.15 Module Marking
  7. 7 Application, Implementation, and Layout
    1. 7.1 Application Information
      1. 7.1.1 Typical Application Circuit
    2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
  8. 8 Environmental Requirements and Specifications
    1. 8.1 PCB Bending
    2. 8.2 Handling Environment
      1. 8.2.1 Terminals
      2. 8.2.2 Falling
    3. 8.3 Storage Condition
      1. 8.3.1 Moisture Barrier Bag Before Opened
      2. 8.3.2 Moisture Barrier Bag Open
    4. 8.4 Baking Conditions
    5. 8.5 Soldering and Reflow Condition
  9. 9 デバイスおよびドキュメントのサポート
    1. 9.1  デバイスの項目表記
    2. 9.2  ツールとソフトウェア
    3. 9.3  ドキュメントのサポート
    4. 9.4  テキサス・インスツルメンツのローパワーRF Webサイト
    5. 9.5  ローパワーRF eニュースレター
    6. 9.6  コミュニティ・リソース
    7. 9.7  追加情報
    8. 9.8  商標
    9. 9.9  静電気放電に関する注意事項
    10. 9.10 Export Control Notice
    11. 9.11 Glossary
  10. 10メカニカル、パッケージ、および注文情報
    1. 10.1 パッケージ情報
    2. 10.2 PACKAGE OPTION ADDENDUM
      1. 10.2.1 PACKAGING INFORMATION
    3. 10.3 PACKAGE MATERIALS INFORMATION
      1. 10.3.1 TAPE AND REEL INFORMATION

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • MOH|29
サーマルパッド・メカニカル・データ
発注情報

6.8 Power Management

To minimize power consumption, the CC2650MODA device supports a number of power modes and power-management features (see Table 6-2).

Table 6-2 Power Modes

MODE SOFTWARE-CONFIGURABLE POWER MODES RESET PIN HELD
ACTIVE IDLE STANDBY SHUTDOWN
CPU Active Off Off Off Off
Flash On Available Off Off Off
SRAM On On On Off Off
Radio Available Available Off Off Off
Supply System On On Duty Cycled Off Off
Current 1.45 mA + 31 µA/MHz 550 µA 1 µA 0.15 µA 0.1 µA
Wake-up time to CPU active(1) – 14 µs 151 µs 1015 µs 1015 µs
Register retention Full Full Partial No No
SRAM retention Full Full Full No No
High-speed clock XOSC_HF or
RCOSC_HF		 XOSC_HF or
RCOSC_HF		 Off Off Off
Low-speed clock XOSC_LF or
RCOSC_LF		 XOSC_LF or
RCOSC_LF		 XOSC_LF or RCOSC_LF Off Off
Peripherals Available Available Off Off Off
Sensor Controller Available Available Available Off Off
Wake up on RTC Available Available Available Off Off
Wake up on pin edge Available Available Available Available Off
Wake up on reset pin Available Available Available Available Available
Brown Out Detector (BOD) Active Active Duty Cycled(2) Off N/A
Power On Reset (POR) Active Active Active Active N/A
(1) Not including RTOS overhead
(2) The Brown Out Detector is disabled between recharge periods in STANDBY. Lowering the supply voltage below the BOD threshold between two recharge periods while in STANDBY may cause the BOD to lock the device upon wake-up until a Reset or POR releases it. To avoid this, TI recommends that STANDBY mode is avoided if there is a risk that the supply voltage (VDD) may drop below the specified operating voltage range. For the same reason, it is also good practice to ensure that a power cycling operation, such as a battery replacement, triggers a Power-on-reset by ensuring that the VDD decoupling network is fully depleted before applying supply voltage again (for example, inserting new batteries).

In active mode, the application Cortex-M3 CPU is actively executing code. Active mode provides normal operation of the processor and all of the peripherals that are currently enabled. The system clock can be any available clock source (see Table 6-2).

In idle mode, all active peripherals can be clocked, but the Application CPU core and memory are not clocked and no code is executed. Any interrupt event will bring the processor back into active mode.

In standby mode, only the always-on domain (AON) is active. An external wake event, RTC event, or sensor-controller event is required to bring the device back to active mode. MCU peripherals with retention do not need to be reconfigured when waking up again, and the CPU continues execution from where it went into standby mode. All GPIOs are latched in standby mode.

In shutdown mode, the device is turned off entirely, including the AON domain and the Sensor Controller. The I/Os are latched with the value they had before entering shutdown mode. A change of state on any I/O pin, defined as a wake from Shutdown pin, wakes up the device and functions as a reset trigger. The CPU can differentiate between a reset in this way, a reset-by-reset pin, or a power-on-reset by reading the reset status register. The only state retained in this mode is the latched I/O state and the flash memory contents.

The Sensor Controller is an autonomous processor that can control the peripherals in the Sensor Controller independently of the main CPU, which means that the main CPU does not have to wake up, for example, to execute an ADC sample or poll a digital sensor over SPI. The main CPU saves both current and wake-up time that would otherwise be wasted. The Sensor Controller Studio enables the user to configure the sensor controller and choose which peripherals are controlled and which conditions wake up the main CPU.