JAJSOW2B February 2022 – August 2023 CC2651R3SIPA
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | TYP | UNIT | |
---|---|---|---|---|
Core Current Consumption | ||||
Icore | Reset and Shutdown | Reset. RESET_N pin asserted or VDDS below power-on-reset threshold | 150 | nA |
Shutdown. No clocks running, no retention | 100 | |||
Standby without cache retention |
RTC running, CPU, 32KB RAM and (partial) register retention. RCOSC_LF |
0.8 | µA | |
RTC running, CPU, 32KB RAM and (partial) register retention XOSC_LF |
0.9 | µA | ||
Standby with cache retention |
RTC running, CPU, 32KB RAM and (partial) register retention. RCOSC_LF |
2.4 | µA | |
RTC running, CPU, 32KB RAM and (partial) register retention. XOSC_LF |
2.6 | µA | ||
Idle | Supply Systems and RAM powered RCOSC_HF |
650 | µA | |
Active | MCU running CoreMark at 48 MHz RCOSC_HF |
2.91 | mA | |
Peripheral Current Consumption | ||||
Iperi | Peripheral power domain | Delta current with domain enabled | 56 | µA |
Serial power domain | Delta current with domain enabled | 5.0 | ||
RF Core | Delta current with power domain enabled, clock enabled, RF core idle |
144 | ||
µDMA | Delta current with clock enabled, module is idle | 68.6 | ||
Timers | Delta current with clock enabled, module is idle(3) | 102 | ||
I2C | Delta current with clock enabled, module is idle | 12.1 | ||
I2S | Delta current with clock enabled, module is idle | 30.8 | ||
SSI | Delta current with clock enabled, module is idle | 71.7 | ||
UART | Delta current with clock enabled, module is idle(1) | 147 | ||
CRYPTO (AES) | Delta current with clock enabled, module is idle(2) |
28.1 | ||
TRNG | Delta current with clock enabled, module is idle |
27.1 |