JAJSVI6 データシート

JAJSVI6 October 2024 CC2745P10-Q1

ADVANCE INFORMATION

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

RHA|40
- MPQF135D

サーマルパッド・メカニカル・データ

RHA|40
- QFND804

発注情報

jajsvi6_oa

6.5 RHA Peripheral Signal Descriptions

Table 6-4 RHA (QFN40) Peripheral Signal Descrpitions

FUNCTION	SIGNAL NAME	Pin No.	PIN TYPE	SIGNAL DIRECTION	DESCRIPTION
FUNCTION	SIGNAL NAME	QFN40	PIN TYPE	SIGNAL DIRECTION	DESCRIPTION
ADC	ADC0	33	I/O	I	ADC channel 0 input
	ADC1	32			ADC channel 1 input
	ADC3	24			ADC channel 3 input
	ADC4	23			ADC channel 4 input
	ADC5	22			ADC channel 5 input
	ADC6	21			ADC channel 6 input
	ADC7	20			ADC channel 7 input
	ADC8	19			ADC channel 8 input
ADC Reference	AREF+	32	I/O	I	ADC external voltage reference, positive terminal
ADC Reference	AREF-	33	I/O	I	ADC external voltage reference, negative terminal
CAN	CAN0TX	4	I/O	O	CAN0 tranmit data output
	CAN0TX	19	I/O	O	CAN0 tranmit data output
	CAN0RX	5	I/O	I	CAN0 receive data input
	CAN0RX	20	I/O	I	CAN0 receive data input
Clock	X32P	26	I/O	I	32kHz crystal oscillator pin 1
	X32N	27	I/O	I	32kHz crystal oscillator pin 2
	X48P	35	—	I	48MHz crystal oscillator pin 1, Optional TCXO input
	X48N	36	—	I	48MHz crystal oscillator pin 2
	CKMIN	32	I/O	I	HFOSC tracking loop reference clock input
	LFCI	26	I/O	I	GPIO input for low frequency clock input (LFXT bypass clock from pin) or optional TCXO
Comparator	LPCO	3	I/O	O	Low power comparator output
		15
		27
	LPC+	21	I/O	I	Low power comparator positive input terminal
		22
		23
	LPC-	22			Lower power comparator negative input terminal
	LPC-	23			Lower power comparator negative input terminal
Digital Test Bus	DTB0	32	I/O	O	Digital test bus output 0
	DTB1	24			Digital test bus output 1
	DTB2	23			Digital test bus output 2
	DTB3	22			Digital test bus output 3
	DTB4	21			Digital test bus output 4
	DTB5	20			Digital test bus output 5
	DTB6	19			Digital test bus output 6
	DTB7	16			Digital test bus output 7
	DTB8	14			Digital test bus output 8
	DTB9	13			Digital test bus output 9
	DTB10	10			Digital test bus output 10
	DTB11	8			Digital test bus output 11
	DTB12	7			Digital test bus output 12
	DTB13	6			Digital test bus output 13
	DTB14	5			Digital test bus output 14
	DTB15	4			Digitial test bus output 15
GPIO	GPIO0	3	I/O	I/O	General-purpose input or output
	GPIO1	4
	GPIO2	5
	GPIO3	6
	GPIO4	7
	GPIO5	8
	GPIO7	10
	GPIO9	11
	GPIO10	12
	GPIO11	13
	GPIO12	14
	GPIO15	15
	GPIO16	16
	GPIO17	19
	GPIO18	20
	GPIO19	21
	GPIO20	22
	GPIO21	23
	GPIO22	24
	GPIO23	26
	GPIO24	27
	GPIO27	32
	GPIO28	33
I²C	I2C0SCL	11	I/O	I/O	I²C clock
		23
		32
	I2C0SDA	12	I/O	I/O	I²C data
		24
		33
I²S	I2S0MCLK	16	I/O	O	I²S main clock
	I2S0SCLK	6	I/O	I/O	I²S serial clock
	I2S0SCLK	19	I/O	I/O	I²S serial clock
	I2S0WS	10	I/O	I/O	I²S word select
	I2S0WS	20	I/O	I/O	I²S word select
	I2S0SD0	11	I/O	I/O	I²S serial data 0
	I2S0SD0	21	I/O	I/O	I²S serial data 0
	I2S0SD1	12	I/O	I/O	I²S serial data 1
	I2S0SD1	22	I/O	I/O	I²S serial data 1
	EXTCI	16	I/O	I	I²S external clock
LRF Digital Output	LRFD0	19	I/O	O	LRF digital output 0
	LRFD1	20			LRF digital output 1
	LRFD2	21			LRF digital output 2
	LRFD3	22			LRF digital ouptut 3
	LRFD4	23			LRF digital output 4
	LRFD5	24			LRF digital output 5
	LRFD6	32			LRF digital output 6
	LRFD7	33			LRF digital output 7
Power	VDDR	1	—	—	Internal supply
		2
		34
	VDDS	18	—	—	1.71V to 3.8V DIO supply
		29
		31
		38
	VDDD	28	—	—	For decoupling of internal 1.32-V regulated core-supply.
	VDDIO	9	—	—	1.71V to 3.8V split rail I/O supply
	VDDIO	17	—	—	1.71V to 3.8V split rail I/O supply
	DCDC	30	—	—	Switching node of internal DC/DC converter
Reset	RSTN	25	—	—	Global master device reset (active low)
RF	ANT	39	—	—	50 ohm RF port
SPI	SPI0SCLK	6	I/O	I/O	SPI0 clock
	SPI0SCLK	22	I/O	I/O	SPI0 clock
	SPI0POCI	7	I/O	I/O	SPI0 peripheral out controller in
		8
		24
	SPI0CSN	10	I/O	I/O	SPI0 chip-select
	SPI0CSN	21	I/O	I/O	SPI0 chip-select
	SPI0PICO	7	I/O	I/O	SPI0 peripheral in controller out
		8
		23
	SPI1SCLK	15	I/O	I/O	SPI1 clock
	SPI1SCLK	27	I/O	I/O	SPI1 clock
	SPI1POCI	13	I/O	I/O	SPI1 peripheral out controller in
		14
		33
	SPI1CSN	16	I/O	I/O	SPI1 chip select
	SPI1CSN	26	I/O	I/O	SPI1 chip select
	SPI1PICO	13	I/O	I/O	SPI1 peripheral in controller out
		14
		32
SWD	SWDIO	11	I/O	I/O	Serial wire data input/output
	SWDCK	12	I/O	I	Serial wire clock input
	SWO	13	I/O	O	Serial wire output
Timers - Capture/Compare	T0C0	3	I/O	I/O	Capture input-0 / compare output-0 of Timer-0
		19
		27
	T0C1	11			Capture input-1 / compare output-1 of Timer-0
	T0C1	20			Capture input-1 / compare output-1 of Timer-0
	T0C2	12			Capture input-2 / compare output-2 of Timer-0
	T0C2	26			Capture input-2 / compare output-2 of Timer-0
	T1C0	3	I/O	I/O	Capture input-0 / compare output-0 of Timer-1
		4
		26
	T1C1	4			Capture input-1 / compare output-1 of Timer-1
	T1C1	5			Capture input-1 / compare output-1 of Timer-1
	T1C2	5			Capture input-2 / compare output-2 of Timer-1
	T1C2	7			Capture input-2 / compare output-2 of Timer-1
	T2C0	4	I/O	I/O	Capture input-0 / compare output-0 of Timer-2
	T2C0	6			Capture input-0 / compare output-0 of Timer-2
	T2C1	7			Capture input-1 / compare output-1 of Timer-2
	T2C1	8			Capture input-1 / compare output-1 of Timer-2
	T2C2	8			Capture input-2 / compare output-2 of Timer-2
	T2C2	10			Capture input-2 / compare output-2 of Timer-2
	T3C0	13	I/O	I/O	Capture input-0 / compare output-0 of Timer-3
	T3C0	16			Capture input-0 / compare output-0 of Timer-3
	T3C1	14			Capture input-1 / compare output-1 of Timer-3
	T3C1	15			Capture input-1 / compare output-1 of Timer-3
	T3C2	14			Capture input-2 / compare output-2 of Timer-3
	T3C2	15			Capture input-2 / compare output-2 of Timer-3
Timers - Complementary Capture/PWM	T0C0N	27	I/O	O	Complementary compare/PWM output-0 from Timer-0
	T0C1N	32			Complementary compare/PWM output-1 from Timer-0
	T0C2N	33			Complementary compare/PWM output-2 from Timer-0
	T1C0N	15	I/O	O	Complementary compare/PWM output-0 from Timer-1
	T1C1N	23			Complementary compare/PWM output-1 from Timer-1
	T1C2N	24			Complementary compare/PWM output-2 from Timer-1
	T2C0N	11	I/O	O	Complementary compare/PWM output-0 from Timer-2
	T2C1N	12			Complementary compare/PWM output-1 from Timer-2
	T2C2N	14			Complementary compare/PWM output-2 from Timer-2
	T3C0N	3	I/O	O	Complementary compare/PWM output-0 from Timer-3
	T3C0N	33			Complementary compare/PWM output-0 from Timer-3
	T3C1N	8			Complementary compare/PWM output-1 from Timer-3
	T3C2N	10			Complementary compare/PWM output-2 from Timer-3
Timers - Fault input	T1F	3	I/O	I	Fault input for Timer-1
		13
		16
Timers - Prescaler Event	T2PE	6	I/O	O	Prescaler event ouput from Timer-2
	T2PE	12	I/O	O	Prescaler event ouput from Timer-2
	T0PE	5	I/O	O	Prescaler eveny ouput from Timer-0
	T0PE	11	I/O	O	Prescaler eveny ouput from Timer-0
UART	UART0TXD	4	I/O	O	UART0 TX data
		21
		22
	UART0RXD	5	I/O	I	UART0 RX data
		21
		22
	UART0CTS	20	I/O	I	UART0 clear-to-send input (active low)
	UART0RTS	19	I/O	O	UART0 request-to-send (active low)
	UART1TXD	6	I/O	O	UART1 TX data
	UART1TXD	23	I/O	O	UART1 TX data
	UART1RXD	7	I/O	I	UART1 RX data
	UART1RXD	24	I/O	I	UART1 RX data
	UART1CTS	27	I/O	I	UART1 clear-to-send input (active low)
	UART1RTS	26	I/O	O	UART1 request-to-send (active low)