JAJSVI6 October   2024 CC2745P10-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1特長
  3. 2アプリケーション
  4. 3概要
  5. 4機能ブロック図
  6. 5Device Comparison
  7. 6Pin Configuration and Functions
    1. 6.1 Pin Diagram—RHA package
    2. 6.2 Signal Descriptions – RHA Package
    3. 6.3 Connections for Unused Pins and Modules—RHA Package
    4. 6.4 RHA Peripheral Pin Mapping
    5. 6.5 RHA Peripheral Signal Descriptions
  8. 7Device and Documentation Support
    1. 7.1 Device Nomenclature
    2. 7.2 Tools and Software
      1. 7.2.1 SimpleLink™ Microcontroller Platform
    3. 7.3 Documentation Support
    4. 7.4 サポート・リソース
    5. 7.5 Trademarks
    6. 7.6 静電気放電に関する注意事項
    7. 7.7 用語集
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.3 Connections for Unused Pins and Modules—RHA Package

Table 6-2 Connections for Unused Pins—RHA Package
FUNCTIONSIGNAL NAMEPIN NUMBERACCEPTABLE PRACTICE(1)PREFERRED
PRACTICE(1)
GPIO (digital)DIOn3–8
10
13–16		NC, GND, or VDDSNC
SWDDIO9_SWDIO11NC, GND, or VDDSGND or VDDS
DIO10_SWDCK12NC, GND, or VDDSGND or VDDS
GPIO (digital or analog)DIOn_Am19–24
32–33		NC, GND, or VDDSNC
32.768kHz crystalDIO23_X32P26NC or GNDNC
DIO24_X32N27
DC/DC converter(2)DCDC30NCNC
VDDS18, 29, 31, 38VDDSVDDS
Split Rail I/O supplyVDDIO9, 17VDDSVDDS
(1) NC = No connect
(2) When the DC/DC converter is not used, the inductor between DCDC and VDDR can be removed. VDDR must still be connected and the 10 μF capacitor must be kept on the VDDR net.