JAJSIK6C February   2020  – December 2024 CC3235MODAS , CC3235MODASF , CC3235MODS , CC3235MODSF

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 機能ブロック図
  6. 5 Device Comparison
    1. 5.1 Related Products
  7. 6 Pin Configuration and Functions
    1. 6.1 CC3235MODx and CC3235MODAx Pin Diagram
    2. 6.2 Pin Attributes and Pin Multiplexing
      1. 6.2.1 Module Pin Descriptions
    3. 6.3 Signal Descriptions
    4. 6.4 Drive Strength and Reset States for Analog-Digital Multiplexed Pins
    5. 6.5 Pad State After Application of Power to Chip, but Before Reset Release
    6. 6.6 Connections for Unused Pins
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Current Consumption (CC3235MODS and CC3235MODAS)
      1.      21
      2.      22
    5. 7.5  Current Consumption (CC3235MODSF and CC3235MODASF)
      1.      24
      2.      25
    6. 7.6  TX Power Control for 2.4 GHz Band
    7. 7.7  TX Power Control for 5 GHz
    8. 7.8  Brownout and Blackout Conditions
    9. 7.9  Electrical Characteristics for GPIO Pins
      1. 7.9.1 Electrical Characteristics for Pin Internal Pullup and Pulldown (25°C)
    10. 7.10 CC3235MODAx Antenna Characteristics
    11. 7.11 WLAN Receiver Characteristics
      1.      33
      2.      34
    12. 7.12 WLAN Transmitter Characteristics
      1.      36
      2.      37
    13. 7.13 BLE and WLAN Coexistence Requirements
    14. 7.14 Reset Requirement
    15. 7.15 Thermal Resistance Characteristics for MOB and MON Packages
    16. 7.16 Timing and Switching Characteristics
      1. 7.16.1 Power-Up Sequencing
      2. 7.16.2 Power-Down Sequencing
      3. 7.16.3 Device Reset
      4. 7.16.4 Wake Up From Hibernate Timing
      5. 7.16.5 Peripherals Timing
        1. 7.16.5.1  SPI
          1. 7.16.5.1.1 SPI Master
          2. 7.16.5.1.2 SPI Slave
        2. 7.16.5.2  I2S
          1. 7.16.5.2.1 I2S Transmit Mode
          2. 7.16.5.2.2 I2S Receive Mode
        3. 7.16.5.3  GPIOs
          1. 7.16.5.3.1 GPIO Input Transition Time Parameters
        4. 7.16.5.4  I2C
        5. 7.16.5.5  IEEE 1149.1 JTAG
        6. 7.16.5.6  ADC
        7. 7.16.5.7  Camera Parallel Port
        8. 7.16.5.8  UART
        9. 7.16.5.9  External Flash Interface
        10. 7.16.5.10 SD Host
        11. 7.16.5.11 Timers
  9. 8 Detailed Description
    1. 8.1  Overview
    2. 8.2  Functional Block Diagram
    3. 8.3  Arm Cortex-M4 Processor Core Subsystem
    4. 8.4  Wi-Fi Network Processor Subsystem
      1. 8.4.1 WLAN
      2. 8.4.2 Network Stack
    5. 8.5  Security
    6. 8.6  FIPS 140-2 Level 1 Certification
    7. 8.7  Power-Management Subsystem
      1. 8.7.1 VBAT Wide-Voltage Connection
    8. 8.8  Low-Power Operating Mode
    9. 8.9  Memory
      1. 8.9.1 Internal Memory
        1. 8.9.1.1 SRAM
        2. 8.9.1.2 ROM
        3. 8.9.1.3 Flash Memory
        4. 8.9.1.4 Memory Map
    10. 8.10 Restoring Factory Default Configuration
    11. 8.11 Boot Modes
      1. 8.11.1 Boot Mode List
    12. 8.12 Hostless Mode
    13. 8.13 Device Certification and Qualification
      1. 8.13.1 FCC Certification and Statement
      2. 8.13.2 IC/ISED Certification and Statement
      3. 8.13.3 ETSI/CE Certification
      4. 8.13.4 MIC Certification
    14. 8.14 Module Markings
    15. 8.15 End Product Labeling
    16. 8.16 Manual Information to the End User
  10. 9 Applications, Implementation, and Layout
    1. 9.1 Typical Application
      1. 9.1.1 BLE/2.4GHz Radio Coexistence
      2. 9.1.2 Antenna Selection (CC3235MODx only)
      3. 9.1.3 Typical Application Schematic (CC3235MODx)
      4. 9.1.4 Typical Application Schematic (CC3235MODAx)
    2. 9.2 Device Connection and Layout Fundamentals
      1. 9.2.1 Power Supply Decoupling and Bulk Capacitors
      2. 9.2.2 Reset
      3. 9.2.3 Unused Pins
    3. 9.3 PCB Layout Guidelines
      1. 9.3.1 General Layout Recommendations
      2. 9.3.2 CC3235MODx RF Layout Recommendations
        1. 9.3.2.1 Antenna Placement and Routing
        2. 9.3.2.2 Transmission Line Considerations
      3. 9.3.3 CC3235MODAx RF Layout Recommendations
  11. 10Environmental Requirements and SMT Specifications
    1. 10.1 PCB Bending
    2. 10.2 Handling Environment
      1. 10.2.1 Terminals
      2. 10.2.2 Falling
    3. 10.3 Storage Condition
      1. 10.3.1 Moisture Barrier Bag Before Opened
      2. 10.3.2 Moisture Barrier Bag Open
    4. 10.4 PCB Assembly Guide
      1. 10.4.1 PCB Land Pattern and Thermal Vias
      2. 10.4.2 SMT Assembly Recommendations
      3. 10.4.3 PCB Surface Finish Requirements
      4. 10.4.4 Solder Stencil
      5. 10.4.5 Package Placement
      6. 10.4.6 Solder Joint Inspection
      7. 10.4.7 Rework and Replacement
      8. 10.4.8 Solder Joint Voiding
    5. 10.5 Baking Conditions
    6. 10.6 Soldering and Reflow Condition
  12. 11Device and Documentation Support
    1. 11.1 Development Tools and Software
    2. 11.2 Firmware Updates
    3. 11.3 Device Nomenclature
    4. 11.4 Documentation Support
    5. 11.5 Related Links
    6. 11.6 サポート・リソース
    7. 11.7 Trademarks
    8. 11.8 静電気放電に関する注意事項
    9. 11.9 用語集
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Mechanical, Land, and Solder Paste Drawings
    2. 13.2 Package Option Addendum
      1. 13.2.1 Packaging Information
      2. 13.2.2 Tape and Reel Information
      3. 13.2.3 CC3235MODx Tape Specifications
      4. 13.2.4 CC3235MODAx Tape Specifications

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • MOB|63
サーマルパッド・メカニカル・データ
発注情報

8.12 Hostless Mode

The SimpleLink™ Wi-Fi® CC3235MODx or CC3235MODAx devices incorporate a scripting ability that enables offloading of simple tasks from the host processor. Using simple and conditional scripts, repetitive tasks can be handled internally, which allows the host processor to remain in a low-power state. In some cases where the scripter is being used to send packets, it reduces code footprint and memory consumption. The if-this-then-that style of conditioning can include anything from GPIO toggling to transmitting packets.

The conditional scripting abilities can be divided into conditions and actions. The conditions define when to trigger actions. Only one action can be defined per condition, but multiple instances of the same condition may be used, so in effect, multiple actions can be defined for a single condition. In total, 16 condition and action pairs can be defined. The conditions can be simple, or complex using subconditions (using a combinatorial AND condition between them). The actions are divided into two types, those that can occur during runtime and those that can occur only during the initialization phase.

The following actions can only be performed when triggered by the preinitialization condition:

  • Set roles AP, station, P2P, and Tag modes
  • Delete all stored profiles
  • Set connection policy
  • Hardware GPIO indication allows an I/O to be driven directly from the WLAN core hardware to indicate internal signaling

The following actions may be activated during runtime:

  • Send transceiver packet
  • Send UDP packet
  • Send TCP packet
  • Increment counter increments one of the user counters by 1
  • Set counter allows setting a specific value to a counter
  • Timer control
  • Set GPIO allows GPIO output from the device using the internal networking core
  • Enter Hibernate state

Note:

Consider the following limitations:

  • Timing cannot be ensured when using the network scripter because some variable latency will apply depending on the utilization of the networking core.
  • The scripter is limited to 16 pairs of conditions and reactions.
  • Both timers and counters are limited to 8 instances each. Timers are limited to a resolution of 1 second. Counters are 32 bits wide.
  • Packet length is limited to the size of one packet and the number of possible packet tokens is limited to 8.