JAJSUX9D June   2003  – August 2024 CD4067B , CD4097B

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 AC Performance Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Test Circuits
  8. 7 Detailed Description
    1. 7.1 Functional Block Diagram
    2. 7.2 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Special Considerations
    2. 8.2 Typical Application
  10. 9 Device and Documentation Support
    1. 9.1 ドキュメントの更新通知を受け取る方法
    2. 9.2 サポート・リソース
    3. 9.3 Trademarks
    4. 9.4 静電気放電に関する注意事項
    5. 9.5 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

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メカニカル・データ（パッケージ｜ピン）
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発注情報

5.5 Electrical Characteristics

Over operating free-air temperature range, VSUPPLY = ±5V, and RL = 100Ω, (unless otherwise noted)(1)
PARAMETER TEST CONDITIONS TEST CONDITIONS TEST CONDITIONS TEST CONDITIONS MIN TYP MAX UNIT
SIGNAL INPUTS (VIS) AND OUTPUTS (VOS)
IDD
 
Quiescent Device Current
 		 Vis = 0 to 5V
VDD = 5V		 TA = –55°C 13 µA
TA = –40°C 13
TA = 25°C 5 14.5
TA = 85°C 150
TA = 125°C 150
Vis = 0 to 5V
VDD = 10V		 TA = –55°C 14
TA = –40°C 14
TA = 25°C 6 15.5
TA = 85°C 300
TA = 125°C 300
Vis = 0 to 5V
VDD = 15V		 TA = –55°C 20
TA = –40°C 20
TA = 25°C 6 20
TA = 85°C 600
TA = 125°C 600
Vis = 0 to 5V
VDD = 20V		 TA = –55°C 100
TA = –40°C 100
TA = 25°C 7 100
TA = 85°C 3000
TA = 125°C 3000
 rON  ON Resistance rON Max to (VDD-VSS)/2 ,
VC = VDD,
RL = 10kΩ returned Vis = VSS to VDD		 VDD = 5V TA = –55°C 800 Ω
TA = –40°C 850
TA = 25°C 470 1050
TA = 85°C 1200
TA = 125°C 1300
VDD = 10V TA = –55°C 310
TA = –40°C 330
TA = 25°C 180 400
TA = 85°C 520
TA = 125°C 550
VDD = 15V TA = –55°C 200
TA = –40°C 210
TA = 25°C 125 240
TA = 85°C 300
VDD = 15V TA = 125°C 320
ΔRON On-state resistance difference between any two switches RL = 10kΩ, VC = VDD VDD = 5V 15 Ω
On-state resistance difference between any two switches On-state resistance difference between any two switches VDD = 10V 10
On-state resistance difference between any two switches On-state resistance difference between any two switches VDD = 15V 5
OFF Channel Leakage Current: Any Channel OFF (Max)
or ALL Channels OFF (COMMON OUT/IN) (Max)		 VDD - VSS  = 18V TA = –55°C ± 100 nA
TA = –40°C ± 100
TA = 25°C ± 0.1 ± 100(2)
TA = 85°C ± 1000(2)
TA = 125°C ± 1000(2)
CIS Input capacitance VS = 0V
f = 1MHz
CD4067		 VDD = 5V, VC = VSS = –5V VDD = 5V, VC = VSS = –5V VDD = 5V, VC = VSS = –5V VDD = 5V, VC = VSS = –5V 5 pF
COS Output capacitance VS = 0V
f = 1MHz
CD4067		 VDD = 5V, VC = VSS = –5V VDD = 5V, VC = VSS = –5V VDD = 5V, VC = VSS = –5V VDD = 5V, VC = VSS = –5V 55 pF
COS Output capacitance VS = 0V
f = 1MHz
CD4097
 		 VDD = 5V, VC = VSS = –5V VDD = 5V, VC = VSS = –5V VDD = 5V, VC = VSS = –5V VDD = 5V, VC = VSS = –5V 35 pF
CIOS Feed through VS = 0V
f = 1MHz		 VDD = 5V, VC = VSS = –5V VDD = 5V, VC = VSS = –5V VDD = 5V, VC = VSS = –5V VDD = 5V, VC = VSS = –5V 0.2 pF
VIHC Control input, high voltage See Figure 6-1 VDD = 5V 3.5 V
VDD = 10V 7 V
VDD = 15V 11 V
VILC Control input, low voltage (max) VDD = 5V 1 V
VDD = 10V 1 V
VDD = 15V 1 V
IIN Input current (max) Vis ≤ VDD, VDD – VSS = 18V, VCC ≤ VDD – VSS VDD = 18V TA = –55°C -0.1 1 µA
TA = –40°C -0.1 1
TA = 25°C -0.1 0.0001 1
Input current (max) Input current (max) TA = 85°C -1 1
Input current (max) Input current (max) TA = 125°C -1 1
CIN Input Capacitance 5 7.5 pF
BW –3dB cutoff frequency (switch on) CD4067 VC = VDD = 5V, VSS = –5V, Vis(p-p) = 5V (sine wave centered on 0V), RL = 1kΩ
Common Out/In		 14 MHz
CD4097 20
–3dB cutoff frequency (switch on) VC = VDD = 5V, VSS = –5V, Vis(p-p) = 5V (sine wave centered on 0V), RL = 1kΩ
Any channel		 60
THD Total Harmonic Distortion Total Harmonic Distortion VC = VDD = 5V, VSS = 0V, Vis(p-p) = 2V (sine wave centered on 0V), RL = 10kΩ, fis = 1-kHz sine wave 0.3 %
VC = VDD = 10V, VSS = 0V, Vis(p-p) = 3V (sine wave centered on 0V), RL = 10kΩ, fis = 1-kHz sine wave 0.2
VC = VDD = 15V, VSS = 0V, Vis(p-p) = 5V (sine wave centered on 0V), RL = 10kΩ, fis = 1-kHz sine wave 0.12
OISO –40dB feed through frequency (switch off) CD4067 VC = VDD = 5V, VSS = –5V, Vis(p-p) = 5V (sine wave centered on 0V), RL = 1kΩ
Common Out/In		 20 MHz
CD4097 12

–40dB feed through frequency (switch off)

 VC = VDD = 5V, VSS = –5V, Vis(p-p) = 5V (sine wave centered on 0V), RL = 1kΩ
Any channel		 8
XTALK –40dB crosstalk frequency Any 2 Channels VC = VDD = 5V, VSS = –5V, Vis(p-p) = 5V (sine wave centered on 0V), RL = 1kΩ 1 MHz
CD4097 on Common 10
CD4097 on Any  18
Crosstalk (control input to signal output) VC = 10V (square wave), RL = 10kΩ VDD = 10V 75 mV
(1) Peak-to-Peak voltage symmetrical about (VDD – VEE) / 2.
(2) Determined by minimum feasible leakage measurement for automatic testing.