JAJSV61A March   2003  – August 2024 CD54AC32 , CD74AC32

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 概要
  4. 3 Pin Configuration and Functions
  5. 4 Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 ESD Ratings
    3. 4.3 Recommended Operating Conditions
    4. 4.4 Thermal Information
    5. 4.5 Electrical Characteristics
    6. 4.6 Switching Characteristics, VCC = 1.5V
    7. 4.7 Switching Characteristics, VCC = 3.3V ± 0.3V
    8. 4.8 Switching Characteristics, VCC = 5V ± 0.5V
    9. 4.9 Operating Characteristics
  6. 5 Parameter Measurement Information
  7. 6 Detailed Description
    1. 6.1 Functional Block Diagram
    2. 6.2 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Power Supply Recommendations
    2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
      2. 7.2.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support (Analog)
      1. 8.1.1 Related Documentation
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • J|14
サーマルパッド・メカニカル・データ

3 Pin Configuration and Functions

CD54AC32 CD74AC32 CD54AC32 J Package, 14-Pin CDIP; CD74AC32 N or D Package, 14-Pin PDIP or SOIC (Top View) Figure 3-1 CD54AC32 J Package, 14-Pin CDIP; CD74AC32 N or D Package, 14-Pin PDIP or SOIC (Top View)
Table 3-1 Pin Functions
PIN I/O1 DESCRIPTION
NAME SOIC, PDIP, CDIP
1A 1 I 1A Input
1B 2 I 1B Input
1Y 3 O 1Y Output
2A 4 I 2A Input
2B 5 I 2B Input
2Y 6 O 2Y Output
3Y 8 O 3Y Output
3A 9 I 3A Input
3B 10 I 3B Input
4Y 11 O 4Y Output
4A 12 I 4A Input
4B 13 I 4B Input
GND 7 — Ground Pin
NC — — No Connection
VCC 14 — Power Pin
  1. I = input, O = output, P = power, FB = feedback, GND = ground, N/A = not applicable