JAJSNE8D February   1998  – November 2021 CD54HC165 , CD54HCT165 , CD74HC165 , CD74HCT165

PRODUCTION DATA  

  1. 1 特長
  2. 2 概要
  3. 3 Revision History
  4. 4 Pin Configuration and Functions
  5. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Reccomended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Prerequisite for Switching Characteristics
    6. 5.6 Switching Characteristics
  6. 6 Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  8. 8 Power Supply Recommendations
  9. 9 Layout
    1. 9.1 Layout Guidelines
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 サポート・リソース
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • J|16
サーマルパッド・メカニカル・データ
発注情報

5.5 Prerequisite for Switching Characteristics

PARAMETER VCC (V) 25℃ -40℃ to 85℃ -55℃ to 125℃ UNIT
MIN MAX MIN MAX MIN MAX
tWL, tWH CLK Pulse Width 2 80 100 120 ns
4.5 16 20 24
6 14 17 20
tWL SH/LD Pulse Width 2 80 100 120 ns
4.5 16 20 24
6 14 17 20
tSU Set-up Time

SER to CLK

 2 80 100 120 ns
4.5 16 20 24
6 14 17 20
tSU(L) CLK INH to CLK 2 80 100 120 ns
4.5 16 20 24
6 14 17 20
tSU A-H to SH/LD 2 80 100 120 ns
4.5 16 20 24
6 14 17 20
tH

Hold Time

SER to CLK or CLK INH

 2 35 45 55 ns
4.5 7 9 11
6 6 8 9
tH CLK INH to CLK 2 0 0 0 ns
4.5 0 0 0
6 0 0 0
tREC Recovery Time

SH/LD to CLK

 2 100 125 150 ns
4.5 20 25 30
6 17 21 26
fMAX Maximum Clock Pulse Frequency 2 6 5 4 MHz
4.5 30 24 20
6 35 28 24
HCT TYPES
tWL, tWH CLK Pulse Width 4.5 18 23 27 ns
tWL SH/LD Pulse Width 4.5 20 25 30 ns
tSU Set-up Time

SER to CLK

 4.5 20 25 30 ns
tSU(L) CLK INH to CLK 4.5 20 25 30 ns
tSU A-H to SH/LD 6 20 25 30 ns
tH

Hold Time

SER to CLK or CLK INH

 4.5 7 9 11 ns
tS, tH CLK INH to CLK 4.5 0 0 0 ns
tREC Recovery Time

SH/LD to CLK

 4.5 20 25 30 ns
fMAX Maximum Clock Pulse Frequency 4.5 27 22 18 MHz