JAJSL14D january   1998  – january 2021 CD54HC00 , CD74HC00

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5.   5
  6.   6
  7. 4 Revision History
  8. 5 Pin Configuration and Functions
    1.     Pin Functions
  9. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Operating Characteristics
    8. 6.8 Typical Characteristics
  10. 7 Parameter Measurement Information
  11. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Balanced CMOS Push-Pull Outputs
    4. 8.4 Standard CMOS Inputs
    5. 8.5 Clamp Diode Structure
    6. 8.6 Device Functional Modes
  12. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Power Considerations
        2. 9.2.1.2 Input Considerations
        3. 9.2.1.3 Output Considerations
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  13. 10Power Supply Recommendations
  14. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  15. 12Device and Documentation Support
    1. 12.1 Documentation Support
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 用語集
  16. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

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メカニカル・データ（パッケージ｜ピン）
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発注情報

9.2.1.1 Power Considerations

Ensure the desired supply voltage is within the range specified in the Recommended Operating Conditions. The supply voltage sets the device's electrical characteristics as described in the Electrical Characteristics.

The positive voltage supply must be capable of sourcing current equal to the total current to be sourced by all outputs of the CD74HC00 plus the maximum static supply current, ICC, listed in Electrical Characteristics and any transient current required for switching. The logic device can only source as much current as is provided by the positive supply source. Be sure not to exceed the maximum total current through VCC listed in the Absolute Maximum Ratings.

The ground must be capable of sinking current equal to the total current to be sunk by all outputs of the CD74HC00 plus the maximum supply current, ICC, listed in Electrical Characteristics, and any transient current required for switching. The logic device can only sink as much current as can be sunk into its ground connection. Be sure not to exceed the maximum total current through GND listed in the Absolute Maximum Ratings.

The CD74HC00 can drive a load with a total capacitance less than or equal to 50pF while still meeting all of the datasheet specifications. Larger capacitive loads can be applied, however it is not recommended to exceed 50pF.

The CD74HC00 can drive a load with total resistance described by RL ≥ VO / IO, with the output voltage and current defined in the Electrical Characteristics table with VOH and VOL. When outputting in the high state, the output voltage in the equation is defined as the difference between the measured output voltage and the supply voltage at the VCC pin.

Total power consumption can be calculated using the information provided in CMOS Power Consumption and Cpd Calculation.

Thermal increase can be calculated using the information provided in Thermal Characteristics of Standard Linear and Logic (SLL) Packages and Devices.

CAUTION:

The maximum junction temperature, TJ(max) listed in the Absolute Maximum Ratings, is an additional limitation to prevent damage to the device. Do not violate any values listed in the Absolute Maximum Ratings. These limits are provided to prevent damage to the device.