JAJSOX7D November   1997  – July 2022 CD54HC365 , CD54HC366 , CD54HCT365 , CD74HC365 , CD74HC366 , CD74HCT365

PRODUCTION DATA  

  1. 1 特長
  2. 2 概要
  3. 3 Revision History
  4. 4 Pin Configuration and Functions
  5. 5 Specifications
    1. 5.1 Absolute Maximum Ratings (1)
    2. 5.2 Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 HCT Input Loading Table
    6. 5.6 Switching Characteristics
  6. 6 Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  8. 8 Power Supply Recommendations
  9. 9 Layout
    1. 9.1 Layout Guidelines
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 サポート・リソース
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • N|16
  • D|16
サーマルパッド・メカニカル・データ
発注情報

5.6 Switching Characteristics

tr, tf = 6 ns
PARAMETER TEST CONDITIONS VCC (V) 25℃ 40℃ to 85℃ 55℃ to 125℃ UNIT
TYP MAX MAX MAX
HC TYPES
tPLH, tPHL Propagation delay, data to outputs
HC/HCT 365		 CL = 50 pF 2 105 130 160 ns
4.5 21 26 32 ns
6 18 22 27 ns
CL = 15 pF 5 8 ns
tPLH, tPHL Propagation delay, data to outputs
HC 366		 CL = 50 pF 2 110 140 165 ns
4.5 22 28 33 ns
6 19 24 28 ns
CL = 15 pF 5 9 ns
tPLH, tPHL Propagation delay time, output enable and disable to outputs CL = 50 pF 2 150 190 225 ns
4.5 30 38 45 ns
6 26 33 38 ns
CL = 15 pF 5 12 ns
tTLH, tTHL Output transition time CL = 50 pF 2 60 75 90 ns
4.5 12 15 18 ns
6 10 13 15 ns
CI Input capacitance 10 10 10 pF
CO Three-state ouput capacitance 20 20 20 pF
CPD Power dissipation capacitance(1)(2) 5 40 pF
HCT TYPES
tPLH, tPHL Propagation delay, data to outputs
HC/HCT 365		 CL = 50 pF 4.5 25 31 38 ns
ns
CL = 15 pF 5 9 ns
ns
tPLH, tPHL Propagation delay, data to outputs
HC 366		 CL = 50 pF 4.5 27 34 41 ns
CL = 15 pF 5 11 ns
tPLH, tPHL Propagation delay time, output enable and disable to ouputs CL = 50 pF 4.5 35 44 53 ns
CL = 15 pF 5 14 ns
tTLH, tTHL Output transition time CL = 50 pF 4.5 12 15 18 ns
CIN Input capacitance 10 10 10 pF
CO Three-stage capacitance 20 20 20 pF
CPD Power dissipation capacitance(1)(2) 5 42 pF
(1) CPD is used to determine the dynamic power consumption, per buffer.
(2) PD = VCC2 fi (CPD + CI) where fi = input frequency, CL = output load capacitance, VCC = supply voltage.