JAJSOX7D November   1997  – July 2022 CD54HC365 , CD54HC366 , CD54HCT365 , CD74HC365 , CD74HC366 , CD74HCT365

PRODUCTION DATA  

  1. 1 特長
  2. 2 概要
  3. 3 Revision History
  4. 4 Pin Configuration and Functions
  5. 5 Specifications
    1. 5.1 Absolute Maximum Ratings (1)
    2. 5.2 Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 HCT Input Loading Table
    6. 5.6 Switching Characteristics
  6. 6 Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  8. 8 Power Supply Recommendations
  9. 9 Layout
    1. 9.1 Layout Guidelines
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 サポート・リソース
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • N|16
  • D|16
サーマルパッド・メカニカル・データ
発注情報

5.4 Electrical Characteristics

PARAMETER TEST CONDITIONS VCC (V) 25℃ –40℃ to 85℃ –55℃ to 125℃ UNIT
VI (V) IO (mA) MIN TYP MAX MIN MAX MIN MAX
HC TYPES
VIH High level input voltage 2 1.5 1.5 1.5 V
4.5 3.15 3.15 3.15
6 4.2 4.2 4.2
VIL Low level input voltage 2 0.5 0.5 0.5 V
4.5 1.35 1.35 1.35
6 1.8 1.8 1.8
VOH

High level output voltage CMOS loads

 VIH or VIL -0.02 2 1.9 1.9 1.9 V
-0.02 4.5 4.4 4.4 4.4
-0.02 6 5.9 5.9 5.9

High level output voltage TTL loads

 -6 4.5 3.98 3.84 3.7
-7.8 6 5.48 5.34 5.2
VOL

Low level output voltage CMOS loads

 VIH or VIL 0.02 2 0.1 0.1 0.1 V
0.02 4.5 0.1 0.1 0.1
0.02 6 0.1 0.1 0.1

Low level output voltage TTL loads

 VIH or VIL 6 4.5 0.26 0.33 0.4
7.8 6 0.26 0.33 0.4
II Input leakage current VCC or GND 6 ±0.1 ±1 ±1 μA
ICC Quiescent device current VCC or GND 0 6 8 80 160 μA
IOZ Three-state leakage current VIH or VIL VO = VCC or GND 6 ±0.5 ±5 ±10 μA
HCT TYPES
VIH High level input voltage 4.5 to 5.5 2 2 2 V
VIL Low level input voltage 4.5 to 5.5 0.8 0.8 0.8 V
VOH

High level output voltage CMOS loads

 VIH or VIL -0.02 4.5 4.4 4.4 4.4 V

High level output voltage TTL loads

 -4 4.5 3.98 3.84 3.7
VOL

Low level output voltage CMOS loads

 VIH or VIL 0.02 4.5 0.1 0.1 0.1 V

Low level output voltage TTL loads

 4 4.5 0.26 0.33 0.4
II Input leakage current VCC or GND 0 5.5 ±0.1 ±1 ±1 μA
ICC Quiescent device current VCC or GND 0 5.5 8 80 160 μA
ΔICC Additional supply current per input pin: 1 Unit Load(1) VCC - 2.1 4.5 to 5.5 100 360 450 490 μA
IOZ Three-state leakage current VIL or VIH VO = VCC or GND 5.5 ±0.5 ±5 ±10 μA
(1) For dual-supply systems theoretical worst case (VI = 2.4 V, VCC = 5.5 V) specification is 1.8 mA