JAJSND6D November   1997  – November 2021 CD54HC259 , CD54HCT259 , CD74HC259 , CD74HCT259

PRODUCTION DATA  

  1. 特長
  2. 概要
  3. Revision History
  4. Pin Configuration and Functions
  5. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Prerequisite for Switching Characteristics
    6. 5.6 Switching Characteristics (2)
  6. Parameter Measurement Information
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  8. Power Supply Recommendations
  9. Layout
    1. 9.1 Layout Guidelines
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • N|16
  • D|16
サーマルパッド・メカニカル・データ
発注情報

Switching Characteristics(2)

CL = 50pF, Input tt = 6ns
PARAMETER VCC (V) 25°C -40°C to 85°C -55°C to 125°C UNIT
MIN TYP MAX MIN MAX MIN MAX
HC TYPES
tpd

D to Q

2 185 230 280 ns
4.5 15(1) 37 46 56
6 31 39 48

G to Q

2 170 215 255 ns
4.5 14(1) 34 43 51
6 29 37 43

S to Q

2 185 230 280 ns
4.5 15(1) 37 46 56
6 31 39 48

CLR to Q

2 155 195 235 ns
4.5 13(1) 31 39 47
6 26 33 40
tt Output transition time 2 75 95 110 ns
4.5 15 19 22
6 13 16 19
Cpd Power dissipation Capacitance(1) 5 21(1) pF
Ci Input capacitance 10 10 10 10 pF
HCT TYPES
tpd

D to Q

4.5 16(1) 39 49 59 ns

G to Q

4.5 16(1) 38 48 57 ns

S to Q

4.5 17(1) 41 51 61 ns

CLR to Q

4.5 16(1) 39 49 59 pF
Cpd Power dissipaction Capacitance(1) 5 22(1) pF
Ci Input Capacitance 10 10 10 10 pF
tt Output transition time 4.5 15 19 22 ns
CL = 15pF and VCC = 5 V.
For details on CMOS power calculation see, SCAA053B.