JAJSDY3F July 2017 – January 2024 CDCI6214
PRODUCTION DATA
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
The bit fields ch1_glitchless_en can be used to enable glitch-less output divider update. This feature ensures that the high pulse of a clock period is not cut off by the output divider update process. It ensures that setup and hold time of a receiver is not violated. The low pulse in the transition from earlier period to the new period is extended accordingly.