SCAS859F January   2009  – June 2015 CDCLVP111

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 DC Electrical Characteristics, LVECL
    6. 6.6 DC Electrical Characteristics, LVPECL
    7. 6.7 AC Electrical Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Test Configurations
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Fanout Buffer for Line Card Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 LVPECL Output Termination
          2. 9.2.1.2.2 Input Termination
        3. 9.2.1.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power-Supply Filtering
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Management
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VCC Supply voltage (Relative to VEE) –0.3 4.6 V
VI Input voltage –0.3 VCC + 0.5 V
VO Output voltage –0.3 VCC + 0.5 V
IIN Input current ±20 mA
VEE Negative supply voltage (Relative to VCC) –4.6 0.3 V
IBB Sink/source current –1 1 mA
IO DC output current –50 mA
TJ Maximum operating junction temperature 125 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) 3000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) 1500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

MIN NOM MAX UNIT
VCC Supply voltage (relative to VEE) 2.375 2.5/3.3 3.8 V
TA Operating free-air temperature –40 85 °C/W
TJ Operating junction temperature 110 °C

6.4 Thermal Information

THERMAL METRIC(1) CDCLVP111 UNIT
RHB (VQFN) VF (LQFP)
32 PINS
RθJA Junction-to-ambient thermal resistance 45.2 85.1 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 37.5 23.2 °C/W
RθJB Junction-to-board thermal resistance 17.9 49.4 °C/W
ψJT Junction-to-top characterization parameter 1.5 0.9 °C/W
ψJB Junction-to-board characterization parameter 17.9 48.7 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 9.7 — °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 DC Electrical Characteristics, LVECL

Vsupply: VCC = 0 V, VEE = –2.375 V to –3.8 V over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IEE Supply internal current Absolute value of current –40°C, 25°C, 85°C 40 85 mA
ICC Output and internal supply current All outputs terminated 50 Ω to VCC – 2 V –40°C 354 mA
25°C 380
85°C 405
IIN Input current Includes pullup/pulldown resistors,
VIH = VCC, VIL = VCC - 2 V		 –40°C, 25°C, 85°C –150 150 μA
VBB Internally generated bias voltage For VEE = –3 to –3.8 V,
IBB = –0.2 mA		 –40°C, 25°C, 85°C –1.45 –1.3 –1.15 V
VEE = –2.375 to –2.75 V,
IBB = –0.2 mA		 –40°C, 25°C, 85°C –1.4 –1.25 –1.1
VIH High-level input voltage (CLK_SEL) –40°C, 25°C, 85°C –1.165 –0.88 V
VIL Low-level input voltage (CLK_SEL) –40°C, 25°C, 85°C –1.81 –1.475 V
VID Input amplitude (CLKn, CLKn) Difference of input, see (1)CDCLVP111 q_vihvil_cas859.gif –40°C, 25°C, 85°C 0.5 1.3 V
VCM Common-mode voltage (CLKn, CLKn) DC offset relative to VEE –40°C, 25°C, 85°C VEE + 1 –0.3 V
VOH High-level output voltage IOH = –21 mA –40°C –1.26 –0.85 V
25°C –1.2 –0.85
85°C –1.15 –0.85
VOL Low-level output voltage IOL = –5 mA –40°C –1.85 –1.5 V
25°C –1.85 –1.45
85°C –1.85 –1.4
VOD Differential output voltage swing Terminated with 50 Ω to
VCC –2 V, see Figure 5		 –40°C, 25°C, 85°C 600 mV
(1) VID minimum and maximum is required to maintain ac specifications, actual device function tolerates a minimum VID of 100 mV.

6.6 DC Electrical Characteristics, LVPECL

Vsupply: VCC = 2.375 V to 3.8 V, VEE= 0 V over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IEE Supply internal current Absolute value of current –40°C, 25°C, 85°C 40 85 mA
ICC Output and internal supply current All outputs terminated 50 Ω to VCC – 2 V -40°C 354 mA
25°C 380
85°C 405
IIN Input current Includes pullup/pulldown resistors
VIH=VCC, VIL= VCC–2V		 –40°C, 25°C, 85°C –150 150 μA
VBB Internally generated bias voltage VCC = 3 to 3.8 V, IBB= –0.2 mA –40°C, 25°C, 85°C VCC – 1.45 VCC – 1.3 VCC – 1.15 V
VCC = 2.375 to 2.75 V,
IBB = –0.2 mA		 –40°C, 25°C, 85°C VCC – 1.4 VCC – 1.25 VCC – 1.1
VIH High-level input voltage (CLK_SEL) –40°C, 25°C, 85°C VCC – 1.165 VCC – 0.88 V
VIL Low-level input voltage (CLK_SEL) –40°C, 25°C, 85°C VCC – 1.81 VCC – 1.475 V
VID Input amplitude (CLKn, CLKn) Difference of inpu, see (1),CDCLVP111 q_vihvil_cas859.gif –40°C, 25°C, 85°C 0.5 1.3 V
VCM Common-mode
voltage (CLKn, CLKn)		 DC offset relative to VEE –40°C, 25°C, 85°C 1 VCC – 0.3 V
VOH High-level output
voltage		 IOH = –21 mA –40°C VCC – 1.26 VCC – 0.85 V
25°C VCC – 1.2 VCC – 0.85
85°C VCC – 1.15 VCC – 0.85
VOL Low-level output
voltage		 IOL = –5 mA –40°C VCC – 1.85 VCC – 1.5 V
25°C VCC – 1.85 VCC – 1.45
85°C VCC – 1.85 VCC – 1.4
VOD Differential output
voltage swing		 Terminated with 50 Ω to
VCC - 2 V, see Figure 5		 –40°C, 25°C, 85°C 600 mV

6.7 AC Electrical Characteristics

Vsupply: VCC = 2.375 V to 3.8 V, VEE = 0 V or LVECL/LVPECL input VCC = 0 V, VEE = -2.375 V to -3.8 V over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tpd Differential propagation delay CLKn, CLKn to all Q0, Q0… Q9, Q9 See Note D in Figure 2 200 350 ps
tsk(o) Output-to-output skew See Note A in Figure 2 15 30 ps
tsk(pp) Part-to-part skew See Note B in Figure 2 70 ps
taj Additive phase jitter Integration bandwidth of 20 kHz to 20 MHz,
fout = 125 MHz at 25°CC		 0.04 < 0.8 ps
f(max) Maximum frequency Functional up to 3.5 GHz 3500 MHz
tr/tf Output rise and fall time (20%, 80%) See Note D in Figure 2 90 200 ps

6.8 Typical Characteristics

CDCLVP111 D007_SCAS859.gifFigure 1. LVPECL Input Using CLK0 Pair, VCM = 1 V, VID = 0.5 V