JAJST12E April 2004 – February 2024 CDCVF2509
PRODUCTION DATA
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
| PARAMETER | FROM (INPUT) |
TO (OUTPUT) |
VCC, AVCC = 3.3 V ± 0.3 V |
UNIT | |||
|---|---|---|---|---|---|---|---|
| MIN | TYP | MAX | |||||
| t(φ) | Phase error time- static (normalized) (see Figure 4-1 through Figure 4-4) | CLK↑ = 66 MHz to 166 MHz | FBIN↑ | –125 | 125 | ps | |
| tsk(o) | Output skew time(2) | Any Y | Any Y | 100 | ps | ||
| Phase error time-jitter (4) | CLK = 66 MHz to 100 MHz | Any Y or FBOUT | –50 | 50 | ps | ||
| Jitter(cycle-cycle) (see Figure 4-5) | CLK = 66 MHz to 100 MHz | Any Y or FBOUT | -70 | ps | |||
| CLK = 100 MHz to 166 MHz | -65 | ||||||
| Duty cycle | f(CLK) > 60 MHz | Any Y or FBOUT | 45% | 55% | |||
| tr | Rise time | VO = 0.4 V to 2 V | Any Y or FBOUT | 0.3 | 1.1 | ns/V | |
| tf | Fall time | VO = 2 V to 0.4 V | Any Y or FBOUT | 0.3 | 1.1 | ns/V | |
| tPLH | Low-to-high propagation delay time, bypass mode | CLK | Any Y or FBOUT | 1.8 | 3.9 | ns | |
| tPHL | High-to-low propagation delay time, bypass mode | CLK | Any Y or FBOUT | 1.8 | 3.9 | ns | |