SLPS455A January   2014  – August 2014 CSD88537ND

PRODUCTION DATA.  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Revision History
  5. 5Specifications
    1. 5.1 Electrical Characteristics
    2. 5.2 Thermal Information
    3. 5.3 Typical MOSFET Characteristics
  6. 6Device and Documentation Support
    1. 6.1 Trademarks
    2. 6.2 Electrostatic Discharge Caution
    3. 6.3 Glossary
  7. 7Mechanical, Packaging, and Orderable Information
    1. 7.1 SO-8 Package Dimensions
    2. 7.2 Recommended PCB Pattern and Stencil Opening

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • D|8
サーマルパッド・メカニカル・データ
発注情報

5 Specifications

5.1 Electrical Characteristics

(TA = 25°C unless otherwise stated)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
STATIC CHARACTERISTICS
BVDSS Drain-to-Source Voltage VGS = 0 V, ID = 250 μA 60 V
IDSS Drain-to-Source Leakage Current VGS = 0 V, VDS = 48 V 1 μA
IGSS Gate-to-Source Leakage Current VDS = 0 V, VGS = 20 V 100 nA
VGS(th) Gate-to-Source Threshold Voltage VDS = VGS, ID = 250 μA 2.6 3 3.6 V
RDS(on) Drain-to-Source On-Resistance VGS = 6 V, ID = 8 A 15 19
VGS = 10 V, ID = 8 A 12.5 15
gƒs Transconductance VDS = 30 V, ID = 8 A 42 S
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance VGS = 0 V, VDS = 30 V, ƒ = 1 MHz 1080 1400 pF
Coss Output Capacitance 133 173 pF
Crss Reverse Transfer Capacitance 4 5.2 pF
RG Series Gate Resistance 5.5 11 Ω
Qg Gate Charge Total (10 V) VDS = 30 V, ID = 8 A 14 18 nC
Qgd Gate Charge Gate-to-Drain 2.3 nC
Qgs Gate Charge Gate-to-Source 4.6 nC
Qg(th) Gate Charge at Vth 3.4 nC
Qoss Output Charge VDS = 30 V, VGS = 0 V 25 nC
td(on) Turn On Delay Time VDS = 30 V, VGS = 10 V, IDS = 8 A, RG = 0 Ω 6 ns
tr Rise Time 15 ns
td(off) Turn Off Delay Time 5 ns
tƒ Fall Time 19 ns
DIODE CHARACTERISTICS
VSD Diode Forward Voltage ISD = 8 A, VGS = 0 V 0.8 1 V
Qrr Reverse Recovery Charge VDS= 30 V, IF = 8 A, di/dt = 300 A/μs 50 nC
trr Reverse Recovery Time 30 ns

5.2 Thermal Information

(TA = 25°C unless otherwise stated)
THERMAL METRIC MIN TYP MAX UNIT
RθJL Junction-to-Lead Thermal Resistance(1) 20 °C/W
RθJA Junction-to-Ambient Thermal Resistance(1)(2) 75
(1) RθJL is determined with the device mounted on a 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu pad on a 1.5-inches × 1.5-inches
(3.81-cm × 3.81-cm), 0.06-inch (1.52-mm) thick FR4 PCB. RθJL is specified by design, whereas RθJA is determined by the user’s board design.
(2) Device mounted on FR4 material with 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu.

5.3 Typical MOSFET Characteristics

(TA = 25°C unless otherwise stated)
graph01p2_SLPS455A.png
Figure 1. Transient Thermal Impedance
graph02_SLPS455A.png
Figure 2. Saturation Characteristics
graph03_SLPS455A.png
VDS = 5 V
Figure 3. Transfer Characteristics
graph04_SLPS455A.png
ID = 8 A VDS = 30 V
Figure 4. Gate Charge
graph06_SLPS455A.png
ID = 250 µA
Figure 6. Threshold Voltage vs Temperature
graph08_SLPS455A.png
ID = 8 A
Figure 8. Normalized On-State Resistance vs Temperature
graph10_SLPS455A.png
Single Pulse Max RθJL = 20°C/W
Figure 10. Maximum Safe Operating Area
graph12_SLPS455A.png
Figure 12. Maximum Drain Current vs Temperature
graph05_SLPS455A.png
Figure 5. Capacitance
graph07_SLPS455A.png
Figure 7. On-State Resistance vs Gate-to-Source Voltage
graph09_SLPS455A.png
Figure 9. Typical Diode Forward Voltage
graph11_SLPS455A.png
Figure 11. Single Pulse Unclamped Inductive Switching